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Commit ad6c1d43 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Kukjin Kim
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ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443 



SoCs starting with the S3C2443 contain SPI controllers compatible with the
spi-s3c64xx driver and therefore need separate dma channels for rx and tx.

This patch introduces dma channel declarations for these and changes the
dma-s3c2443.c accordingly.

None of the older SoCs use the spi-dma at all. Most boards bitbang their
spi use and the spi-s3c24xx driver also does not use the dma system.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent d25a8f94

arch/arm/mach-s3c24xx/dma-s3c2443.c

+12 −4
Original line number Original line Diff line number Diff line
@@ -55,12 +55,20 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { 
		.name		= "sdi",

		.name		= "sdi",

		.channels	= MAP(S3C2443_DMAREQSEL_SDI),

		.channels	= MAP(S3C2443_DMAREQSEL_SDI),

	},

	},

	[DMACH_SPI0] = {

	[DMACH_SPI0_RX] = {

		.name		= "spi0",

		.name		= "spi0-rx",

		.channels	= MAP(S3C2443_DMAREQSEL_SPI0RX),

	},

	[DMACH_SPI0_TX] = {

		.name		= "spi0-tx",

		.channels	= MAP(S3C2443_DMAREQSEL_SPI0TX),

		.channels	= MAP(S3C2443_DMAREQSEL_SPI0TX),

	},

	},

	[DMACH_SPI1] = { /* only on S3C2443/S3C2450 */

	[DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */

		.name		= "spi1",

		.name		= "spi1-rx",

		.channels	= MAP(S3C2443_DMAREQSEL_SPI1RX),

	},

	[DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */

		.name		= "spi1-tx",

		.channels	= MAP(S3C2443_DMAREQSEL_SPI1TX),

		.channels	= MAP(S3C2443_DMAREQSEL_SPI1TX),

	},

	},

	[DMACH_UART0] = {

	[DMACH_UART0] = {

arch/arm/mach-s3c24xx/include/mach/dma.h

+4 −0
Original line number Original line Diff line number Diff line
@@ -47,6 +47,10 @@ enum dma_ch { 
	DMACH_UART2_SRC2,

	DMACH_UART2_SRC2,

	DMACH_UART3,		/* s3c2443 has extra uart */

	DMACH_UART3,		/* s3c2443 has extra uart */

	DMACH_UART3_SRC2,

	DMACH_UART3_SRC2,

	DMACH_SPI0_TX,		/* s3c2443/2416/2450 hsspi0 */

	DMACH_SPI0_RX,		/* s3c2443/2416/2450 hsspi0 */

	DMACH_SPI1_TX,		/* s3c2443/2450 hsspi1 */

	DMACH_SPI1_RX,		/* s3c2443/2450 hsspi1 */

	DMACH_MAX,		/* the end entry */

	DMACH_MAX,		/* the end entry */

};

};