Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aca02285 authored by Tony Truong's avatar Tony Truong
Browse files

ARM: dts: msm: add LTR entry for PCIe0 on kona 

add latency tolerance reporting (LTR) for PCIe0 on kona.

Change-Id: I63534979785deb5681842b5a100534429877aefd
parent 67febff5

qcom/kona-pcie.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -93,6 +93,8 @@ 
		qcom,drv-supported;

		qcom,use-19p2mhz-aux-clk;

		qcom,no-l0s-supported;

		qcom,l1-2-th-scale = <2>; /* 1us */

		qcom,l1-2-th-value = <70>;

		qcom,slv-addr-space-size = <0x4000000>;

		qcom,ep-latency = <10>;