Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ab57fff1 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915/bdw: Implement ff workarounds 



WaVSRefCountFullforceMissDisable and
WaDSRefCountFullforceMissDisable

VS is a carry-over from HSW, and DS is likely not used by anyone yet.

Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
[danvet: Line of 106 chars is too long. Really.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 63801f21

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -1003,6 +1003,7 @@ 


#define GEN7_FF_THREAD_MODE		0x20a0

#define   GEN7_FF_SCHED_MASK		0x0077070

#define   GEN8_FF_DS_REF_CNT_FFME	(1 << 19)

#define   GEN7_FF_TS_SCHED_HS1		(0x5<<16)

#define   GEN7_FF_TS_SCHED_HS0		(0x3<<16)

#define   GEN7_FF_TS_SCHED_LOAD_BALANCE	(0x1<<16)

drivers/gpu/drm/i915/intel_pm.c

+9 −3
Original line number Diff line number Diff line
@@ -5256,14 +5256,14 @@ static void gen8_init_clock_gating(struct drm_device *dev) 
	I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,

		   _MASKED_BIT_ENABLE(GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE));



	/* WaSwitchSolVfFArbitrationPriority */

	/* WaSwitchSolVfFArbitrationPriority:bdw */

	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);



	/* WaPsrDPAMaskVBlankInSRD */

	/* WaPsrDPAMaskVBlankInSRD:bdw */

	I915_WRITE(CHICKEN_PAR1_1,

		   I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD);



	/* WaPsrDPRSUnmaskVBlankInSRD */

	/* WaPsrDPRSUnmaskVBlankInSRD:bdw */

	for_each_pipe(i) {

		I915_WRITE(CHICKEN_PIPESL_1(i),

			   I915_READ(CHICKEN_PIPESL_1(i) |
@@ -5277,6 +5277,12 @@ static void gen8_init_clock_gating(struct drm_device *dev) 
	I915_WRITE(HDC_CHICKEN0,

		   I915_READ(HDC_CHICKEN0) |

		   _MASKED_BIT_ENABLE(HDC_FORCE_NON_COHERENT));



	/* WaVSRefCountFullforceMissDisable:bdw */

	/* WaDSRefCountFullforceMissDisable:bdw */

	I915_WRITE(GEN7_FF_THREAD_MODE,

		   I915_READ(GEN7_FF_THREAD_MODE) &

		   ~(GEN8_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME));

}



static void haswell_init_clock_gating(struct drm_device *dev)