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Commit a9dbc436 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: correct names of coresight components for lito"

parents c315f359 8a35a2da
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+15 −13
Original line number Diff line number Diff line
@@ -1564,7 +1564,7 @@
		reg = <0x6c08000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dl-mm";
		coresight-name = "coresight-tpdm-mm";

		clocks = <&aopcc QDSS_CLK>;
		clock-names = "apb_pclk";
@@ -1712,10 +1712,10 @@

			port@2 {
				reg = <1>;
				funnel_modem_in_modem_etm0: endpoint {
				funnel_modem_in_modem_etm1: endpoint {
					slave-mode;
					remote-endpoint =
					<&modem_etm0_out_funnel_modem>;
					<&modem_etm1_out_funnel_modem>;
				};
			};

@@ -1730,16 +1730,16 @@
		};
	};

	modem_etm0 {
	modem_etm1 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-modem-etm0";
		coresight-name = "coresight-modem-etm1";
		qcom,inst-id = <11>;

		port {
			modem_etm0_out_funnel_modem: endpoint {
			modem_etm1_out_funnel_modem: endpoint {
				remote-endpoint =
					<&funnel_modem_in_modem_etm0>;
					<&funnel_modem_in_modem_etm1>;
			};
		};
	};
@@ -1770,10 +1770,10 @@

			port@1 {
				reg = <0>;
				funnel_modem_q6_in_modem_etm1: endpoint {
				funnel_modem_q6_in_modem_etm0: endpoint {
					slave-mode;
					remote-endpoint =
					<&modem_etm1_out_funnel_modem_q6>;
					<&modem_etm0_out_funnel_modem_q6>;
				};
			};
		};
@@ -1839,16 +1839,16 @@
		};
	};

	modem_etm1 {
	modem_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-modem-etm1";
		coresight-name = "coresight-modem-etm0";
		qcom,inst-id = <2>;

		port {
			modem_etm1_out_funnel_modem_q6: endpoint {
			modem_etm0_out_funnel_modem_q6: endpoint {
				remote-endpoint =
					<&funnel_modem_q6_in_modem_etm1>;
					<&funnel_modem_q6_in_modem_etm0>;
			};
		};
	};
@@ -3067,6 +3067,7 @@
		reg = <0x6962000 0x1000>;
		reg-names = "cti-base";

		status = "disabled";
		coresight-name = "coresight-cti-gpu_cortex_m3";

		clocks = <&aopcc QDSS_CLK>;
@@ -3079,6 +3080,7 @@
		reg = <0x6961000 0x1000>;
		reg-names = "cti-base";

		status = "disabled";
		coresight-name = "coresight-cti-gpu_isdb_cti";

		clocks = <&aopcc QDSS_CLK>;