Loading Documentation/devicetree/bindings/clock/qcom,npucc.txt 0 → 100644 +26 −0 Original line number Diff line number Diff line Qualcomm Technologies, Inc. NPU Clock & Reset Controller Bindings ----------------------------------------------------------------- Required properties : - compatible: Should be "qcom,npucc-kona". - reg: Shall contain base register addresses and sizes. - reg-names: Names of the register bases listed in the same order as in the reg property. Shall include: "cc", "qdsp6ss", and "qdsp6ss_pll". - vdd_cx-supply: Phandle of the VDD_CX regulator supply rail that needs to be voted on behalf of the NPU CC clocks. - #clock-cells: Shall contain 1. - #reset-cells: Shall contain 1. Example: clock_npucc: qcom,npucc@9980000 { compatible = "qcom,npucc-kona"; reg = <0x9980000 0x10000>, <0x9800000 0x10000>, <0x9810000 0x10000>; reg-names = "cc", "qdsp6ss", "qdsp6ss_pll"; vdd_cx-supply = <&VDD_CX_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; }; arch/arm64/configs/vendor/kona-perf_defconfig +1 −1 Original line number Diff line number Diff line Loading @@ -413,12 +413,12 @@ CONFIG_USB_BAM=y CONFIG_QCOM_GENI_SE=y CONFIG_QCOM_CLK_RPMH=y CONFIG_SPMI_PMIC_CLKDIV=y CONFIG_MSM_GCC_KONA=y CONFIG_MSM_VIDEOCC_KONA=y CONFIG_MSM_DISPCC_KONA=y CONFIG_MSM_CAMCC_KONA=y CONFIG_MSM_GPUCC_KONA=y CONFIG_MSM_DEBUGCC_KONA=y CONFIG_MSM_NPUCC_KONA=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_MAILBOX=y Loading arch/arm64/configs/vendor/kona_defconfig +1 −1 Original line number Diff line number Diff line Loading @@ -427,12 +427,12 @@ CONFIG_USB_BAM=y CONFIG_QCOM_GENI_SE=y CONFIG_QCOM_CLK_RPMH=y CONFIG_SPMI_PMIC_CLKDIV=y CONFIG_MSM_GCC_KONA=y CONFIG_MSM_VIDEOCC_KONA=y CONFIG_MSM_DISPCC_KONA=y CONFIG_MSM_CAMCC_KONA=y CONFIG_MSM_GPUCC_KONA=y CONFIG_MSM_DEBUGCC_KONA=y CONFIG_MSM_NPUCC_KONA=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_MAILBOX=y Loading drivers/clk/qcom/Kconfig +10 −0 Original line number Diff line number Diff line Loading @@ -337,3 +337,13 @@ config MSM_DEBUGCC_KONA Support for the debug clock controller on Qualcomm Technologies, Inc KONA devices. Say Y if you want to support the clock measurement functionality. config MSM_NPUCC_KONA tristate "KONA NPU Clock Controller" depends on COMMON_CLK_QCOM select MSM_GCC_KONA help Support for the NPU clock controller on Qualcomm Technologies, Inc. KONA devices. Say Y if you want to enable use of the Network Processing Unit in order to speed up certain types of calculations. drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ obj-$(CONFIG_MSM_GPUCC_KONA) += gpucc-kona.o obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o obj-$(CONFIG_MSM_NPUCC_KONA) += npucc-kona.o obj-$(CONFIG_MSM_VIDEOCC_KONA) += videocc-kona.o obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o Loading Loading
Documentation/devicetree/bindings/clock/qcom,npucc.txt 0 → 100644 +26 −0 Original line number Diff line number Diff line Qualcomm Technologies, Inc. NPU Clock & Reset Controller Bindings ----------------------------------------------------------------- Required properties : - compatible: Should be "qcom,npucc-kona". - reg: Shall contain base register addresses and sizes. - reg-names: Names of the register bases listed in the same order as in the reg property. Shall include: "cc", "qdsp6ss", and "qdsp6ss_pll". - vdd_cx-supply: Phandle of the VDD_CX regulator supply rail that needs to be voted on behalf of the NPU CC clocks. - #clock-cells: Shall contain 1. - #reset-cells: Shall contain 1. Example: clock_npucc: qcom,npucc@9980000 { compatible = "qcom,npucc-kona"; reg = <0x9980000 0x10000>, <0x9800000 0x10000>, <0x9810000 0x10000>; reg-names = "cc", "qdsp6ss", "qdsp6ss_pll"; vdd_cx-supply = <&VDD_CX_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; };
arch/arm64/configs/vendor/kona-perf_defconfig +1 −1 Original line number Diff line number Diff line Loading @@ -413,12 +413,12 @@ CONFIG_USB_BAM=y CONFIG_QCOM_GENI_SE=y CONFIG_QCOM_CLK_RPMH=y CONFIG_SPMI_PMIC_CLKDIV=y CONFIG_MSM_GCC_KONA=y CONFIG_MSM_VIDEOCC_KONA=y CONFIG_MSM_DISPCC_KONA=y CONFIG_MSM_CAMCC_KONA=y CONFIG_MSM_GPUCC_KONA=y CONFIG_MSM_DEBUGCC_KONA=y CONFIG_MSM_NPUCC_KONA=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_MAILBOX=y Loading
arch/arm64/configs/vendor/kona_defconfig +1 −1 Original line number Diff line number Diff line Loading @@ -427,12 +427,12 @@ CONFIG_USB_BAM=y CONFIG_QCOM_GENI_SE=y CONFIG_QCOM_CLK_RPMH=y CONFIG_SPMI_PMIC_CLKDIV=y CONFIG_MSM_GCC_KONA=y CONFIG_MSM_VIDEOCC_KONA=y CONFIG_MSM_DISPCC_KONA=y CONFIG_MSM_CAMCC_KONA=y CONFIG_MSM_GPUCC_KONA=y CONFIG_MSM_DEBUGCC_KONA=y CONFIG_MSM_NPUCC_KONA=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_MAILBOX=y Loading
drivers/clk/qcom/Kconfig +10 −0 Original line number Diff line number Diff line Loading @@ -337,3 +337,13 @@ config MSM_DEBUGCC_KONA Support for the debug clock controller on Qualcomm Technologies, Inc KONA devices. Say Y if you want to support the clock measurement functionality. config MSM_NPUCC_KONA tristate "KONA NPU Clock Controller" depends on COMMON_CLK_QCOM select MSM_GCC_KONA help Support for the NPU clock controller on Qualcomm Technologies, Inc. KONA devices. Say Y if you want to enable use of the Network Processing Unit in order to speed up certain types of calculations.
drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ obj-$(CONFIG_MSM_GPUCC_KONA) += gpucc-kona.o obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o obj-$(CONFIG_MSM_NPUCC_KONA) += npucc-kona.o obj-$(CONFIG_MSM_VIDEOCC_KONA) += videocc-kona.o obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o Loading