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Commit a0870ccd authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: pcie: scale CX and rate change after DRV resume"

parents b65d7c65 e8f9ed51

drivers/pci/controller/pci-msm.c

+9 −0
Original line number Original line Diff line number Diff line
@@ -7139,6 +7139,7 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev) 
	struct msm_pcie_drv_info *drv_info = pcie_dev->drv_info;

	struct msm_pcie_drv_info *drv_info = pcie_dev->drv_info;

	struct msm_pcie_drv_msg *drv_disable = &drv_info->drv_disable;

	struct msm_pcie_drv_msg *drv_disable = &drv_info->drv_disable;

	struct msm_pcie_clk_info_t *clk_info;

	struct msm_pcie_clk_info_t *clk_info;

	u32 current_link_speed;

	int ret, i;

	int ret, i;





	mutex_lock(&pcie_dev->recovery_lock);

	mutex_lock(&pcie_dev->recovery_lock);
@@ -7192,6 +7193,14 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev) 
		}

		}

	}

	}





	/* scale CX and rate change based on current GEN speed */

	current_link_speed = readl_relaxed(pcie_dev->dm_core +

					PCIE20_CAP_LINKCTRLSTATUS);

	current_link_speed = ((current_link_speed >> 16) &

				PCI_EXP_LNKSTA_CLS);



	msm_pcie_scale_link_bandwidth(pcie_dev, current_link_speed);



	/* always ungate clkreq */

	/* always ungate clkreq */

	msm_pcie_write_reg_field(pcie_dev->parf,

	msm_pcie_write_reg_field(pcie_dev->parf,

				PCIE20_PARF_CLKREQ_OVERRIDE,

				PCIE20_PARF_CLKREQ_OVERRIDE,