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Commit e8f9ed51 authored by Tony Truong's avatar Tony Truong Committed by Gerrit - the friendly Code Review server
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msm: pcie: scale CX and rate change after DRV resume 



PCIe will vote for maximum CX and rate change during DRV resume.
Scale CX and rate change based on final GEN speed after PCIe
regains control.

Change-Id: I004f4bba6ca12944cd48fd56fa5a1290867c82a9
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent de07386b

drivers/pci/controller/pci-msm.c

+9 −0
Original line number Diff line number Diff line
@@ -7136,6 +7136,7 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev) 
	struct msm_pcie_drv_info *drv_info = pcie_dev->drv_info;

	struct msm_pcie_drv_msg *drv_disable = &drv_info->drv_disable;

	struct msm_pcie_clk_info_t *clk_info;

	u32 current_link_speed;

	int ret, i;



	mutex_lock(&pcie_dev->recovery_lock);
@@ -7189,6 +7190,14 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev) 
		}

	}



	/* scale CX and rate change based on current GEN speed */

	current_link_speed = readl_relaxed(pcie_dev->dm_core +

					PCIE20_CAP_LINKCTRLSTATUS);

	current_link_speed = ((current_link_speed >> 16) &

				PCI_EXP_LNKSTA_CLS);



	msm_pcie_scale_link_bandwidth(pcie_dev, current_link_speed);



	/* always ungate clkreq */

	msm_pcie_write_reg_field(pcie_dev->parf,

				PCIE20_PARF_CLKREQ_OVERRIDE,