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Commit 9f4b3541 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: add CI asics support to smumgr (v3) 



This ports support for CI asics (Bonaire, Hawaii)
to the powerplay smumgr

v2: warning fix (Alex)
v3: squash in fix for thermal (Tom)

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 510c2558

drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h

+2 −0
Original line number Diff line number Diff line
@@ -5454,5 +5454,7 @@ 
#define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT 0x0

#define CURRENT_PG_STATUS__VCE_PG_STATUS_MASK 0x00000002

#define CURRENT_PG_STATUS__UVD_PG_STATUS_MASK 0x00000004

#define SMC_SYSCON_MISC_CNTL__pre_fetcher_en_MASK  0x1

#define SMC_SYSCON_MISC_CNTL__pre_fetcher_en__SHIFT 0



#endif /* SMU_7_0_1_SH_MASK_H */

drivers/gpu/drm/amd/powerplay/inc/smumgr.h

+1 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ struct pp_hwmgr; 
#define smu_lower_32_bits(n) ((uint32_t)(n))

#define smu_upper_32_bits(n) ((uint32_t)(((n)>>16)>>16))



extern const struct pp_smumgr_func ci_smu_funcs;

extern const struct pp_smumgr_func cz_smu_funcs;

extern const struct pp_smumgr_func iceland_smu_funcs;

extern const struct pp_smumgr_func tonga_smu_funcs;

drivers/gpu/drm/amd/powerplay/smumgr/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 


SMU_MGR = smumgr.o cz_smumgr.o tonga_smumgr.o fiji_smumgr.o fiji_smc.o \

	  polaris10_smumgr.o iceland_smumgr.o polaris10_smc.o tonga_smc.o \

	  smu7_smumgr.o iceland_smc.o vega10_smumgr.o rv_smumgr.o

	  smu7_smumgr.o iceland_smc.o vega10_smumgr.o rv_smumgr.o ci_smc.o ci_smumgr.o



AMD_PP_SMUMGR = $(addprefix $(AMD_PP_PATH)/smumgr/,$(SMU_MGR))

drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c

0 → 100644
+2755 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.h

0 → 100644
+52 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2017 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */

#ifndef CI_SMC_H

#define CI_SMC_H



#include <linux/types.h>





struct pp_smumgr;

struct pp_hwmgr;

struct amd_pp_profile;



int ci_send_msg_to_smc_with_parameter(struct pp_smumgr *smumgr,

					uint16_t msg, uint32_t parameter);

int ci_send_msg_to_smc(struct pp_smumgr *smumgr, uint16_t msg);

int ci_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);

int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr);

int ci_init_smc_table(struct pp_hwmgr *hwmgr);

int ci_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);

int ci_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);

int ci_update_sclk_threshold(struct pp_hwmgr *hwmgr);

uint32_t ci_get_offsetof(uint32_t type, uint32_t member);

uint32_t ci_get_mac_definition(uint32_t value);

int ci_process_firmware_header(struct pp_hwmgr *hwmgr);

int ci_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);

bool ci_is_dpm_running(struct pp_hwmgr *hwmgr);

int ci_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,

					struct amd_pp_profile *request);





#endif