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Commit 9e60de1c authored by Stephen Boyd's avatar Stephen Boyd
Browse files

clk: qcom: Remove gcc_aggre1_pnoc_ahb_clk from msm8996 



This clk is critical to operation of the SoC and should never be
turned off. Furthermore, there are no consumers of this clk so
let's just delete it so things like eMMC work.

Reported-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes: b1e010c0 ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver")
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 367b3050

drivers/clk/qcom/gcc-msm8996.c

+0 −16
Original line number Diff line number Diff line
@@ -2891,21 +2891,6 @@ static struct clk_branch gcc_smmu_aggre0_ahb_clk = { 
	},

};



static struct clk_branch gcc_aggre1_pnoc_ahb_clk = {

	.halt_reg = 0x82014,

	.clkr = {

		.enable_reg = 0x82014,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_aggre1_pnoc_ahb_clk",

			.parent_names = (const char *[]){ "periph_noc_clk_src" },

			.num_parents = 1,

			.flags = CLK_SET_RATE_PARENT,

			.ops = &clk_branch2_ops,

		},

	},

};



static struct clk_branch gcc_aggre2_ufs_axi_clk = {

	.halt_reg = 0x83014,

	.clkr = {
@@ -3308,7 +3293,6 @@ static struct clk_regmap *gcc_msm8996_clocks[] = { 
	[GCC_AGGRE0_CNOC_AHB_CLK] = &gcc_aggre0_cnoc_ahb_clk.clkr,

	[GCC_SMMU_AGGRE0_AXI_CLK] = &gcc_smmu_aggre0_axi_clk.clkr,

	[GCC_SMMU_AGGRE0_AHB_CLK] = &gcc_smmu_aggre0_ahb_clk.clkr,

	[GCC_AGGRE1_PNOC_AHB_CLK] = &gcc_aggre1_pnoc_ahb_clk.clkr,

	[GCC_AGGRE2_UFS_AXI_CLK] = &gcc_aggre2_ufs_axi_clk.clkr,

	[GCC_AGGRE2_USB3_AXI_CLK] = &gcc_aggre2_usb3_axi_clk.clkr,

	[GCC_QSPI_AHB_CLK] = &gcc_qspi_ahb_clk.clkr,