Loading Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt 0 → 100644 +36 −0 Original line number Original line Diff line number Diff line * Amlogic GXBB Clock and Reset Unit The Amlogic GXBB clock controller generates and supplies clock to various controllers within the SoC. Required Properties: - compatible: should be "amlogic,gxbb-clkc" - reg: physical base address of the clock controller and length of memory mapped region. - #clock-cells: should be 1. Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be used in device tree sources. Example: Clock controller node: clkc: clock-controller@c883c000 { #clock-cells = <1>; compatible = "amlogic,gxbb-clkc"; reg = <0x0 0xc883c000 0x0 0x3db>; }; Example: UART controller node that consumes the clock generated by the clock controller: uart_AO: serial@c81004c0 { compatible = "amlogic,meson-uart"; reg = <0xc81004c0 0x14>; interrupts = <0 90 1>; clocks = <&clkc CLKID_CLK81>; status = "disabled"; }; drivers/clk/Kconfig +1 −0 Original line number Original line Diff line number Diff line Loading @@ -209,6 +209,7 @@ config COMMON_CLK_OXNAS source "drivers/clk/bcm/Kconfig" source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/meson/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/qcom/Kconfig" source "drivers/clk/qcom/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/renesas/Kconfig" Loading drivers/clk/Makefile +1 −1 Original line number Original line Diff line number Diff line Loading @@ -65,7 +65,7 @@ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_MMP) += mmp/ obj-$(CONFIG_ARCH_MMP) += mmp/ endif endif obj-y += mvebu/ obj-y += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_COMMON_CLK_AMLOGIC) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ Loading drivers/clk/meson/Kconfig 0 → 100644 +19 −0 Original line number Original line Diff line number Diff line config COMMON_CLK_AMLOGIC bool depends on OF depends on ARCH_MESON || COMPILE_TEST config COMMON_CLK_MESON8B bool depends on COMMON_CLK_AMLOGIC help Support for the clock controller on AmLogic S805 devices, aka meson8b. Say Y if you want peripherals and CPU frequency scaling to work. config COMMON_CLK_GXBB bool depends on COMMON_CLK_AMLOGIC help Support for the clock controller on AmLogic S905 devices, aka gxbb. Say Y if you want peripherals and CPU frequency scaling to work. drivers/clk/meson/Makefile +3 −2 Original line number Original line Diff line number Diff line Loading @@ -2,5 +2,6 @@ # Makefile for Meson specific clk # Makefile for Meson specific clk # # obj-y += clkc.o clk-pll.o clk-cpu.o obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o obj-y += meson8b-clkc.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o Loading
Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt 0 → 100644 +36 −0 Original line number Original line Diff line number Diff line * Amlogic GXBB Clock and Reset Unit The Amlogic GXBB clock controller generates and supplies clock to various controllers within the SoC. Required Properties: - compatible: should be "amlogic,gxbb-clkc" - reg: physical base address of the clock controller and length of memory mapped region. - #clock-cells: should be 1. Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be used in device tree sources. Example: Clock controller node: clkc: clock-controller@c883c000 { #clock-cells = <1>; compatible = "amlogic,gxbb-clkc"; reg = <0x0 0xc883c000 0x0 0x3db>; }; Example: UART controller node that consumes the clock generated by the clock controller: uart_AO: serial@c81004c0 { compatible = "amlogic,meson-uart"; reg = <0xc81004c0 0x14>; interrupts = <0 90 1>; clocks = <&clkc CLKID_CLK81>; status = "disabled"; };
drivers/clk/Kconfig +1 −0 Original line number Original line Diff line number Diff line Loading @@ -209,6 +209,7 @@ config COMMON_CLK_OXNAS source "drivers/clk/bcm/Kconfig" source "drivers/clk/bcm/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/hisilicon/Kconfig" source "drivers/clk/meson/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/qcom/Kconfig" source "drivers/clk/qcom/Kconfig" source "drivers/clk/renesas/Kconfig" source "drivers/clk/renesas/Kconfig" Loading
drivers/clk/Makefile +1 −1 Original line number Original line Diff line number Diff line Loading @@ -65,7 +65,7 @@ ifeq ($(CONFIG_COMMON_CLK), y) obj-$(CONFIG_ARCH_MMP) += mmp/ obj-$(CONFIG_ARCH_MMP) += mmp/ endif endif obj-y += mvebu/ obj-y += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_COMMON_CLK_AMLOGIC) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ Loading
drivers/clk/meson/Kconfig 0 → 100644 +19 −0 Original line number Original line Diff line number Diff line config COMMON_CLK_AMLOGIC bool depends on OF depends on ARCH_MESON || COMPILE_TEST config COMMON_CLK_MESON8B bool depends on COMMON_CLK_AMLOGIC help Support for the clock controller on AmLogic S805 devices, aka meson8b. Say Y if you want peripherals and CPU frequency scaling to work. config COMMON_CLK_GXBB bool depends on COMMON_CLK_AMLOGIC help Support for the clock controller on AmLogic S905 devices, aka gxbb. Say Y if you want peripherals and CPU frequency scaling to work.
drivers/clk/meson/Makefile +3 −2 Original line number Original line Diff line number Diff line Loading @@ -2,5 +2,6 @@ # Makefile for Meson specific clk # Makefile for Meson specific clk # # obj-y += clkc.o clk-pll.o clk-cpu.o obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o obj-y += meson8b-clkc.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o
