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Commit 9cec3b40 authored by Satya Rama Aditya Pinapala's avatar Satya Rama Aditya Pinapala Committed by Gerrit - the friendly Code Review server
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clk/qcom/mdss: Fixing MDSS PLL Compilation 



This change fixes MDSS PLL compilation.

Change-Id: Ib1d95a69b98e2896b7bc6c0615f10ab338db086a
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
parent e47d034a

drivers/clk/qcom/clk-regmap-divider.h

+3 −10
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2014, The Linux Foundation. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 * Copyright (c) 2014,2019 The Linux Foundation. All rights reserved.

 */



#ifndef __QCOM_CLK_REGMAP_DIVIDER_H__
@@ -21,6 +13,7 @@ struct clk_regmap_div { 
	u32			reg;

	u32			shift;

	u32			width;

	u32			flags;

	struct clk_regmap	clkr;

};

drivers/clk/qcom/mdss/mdss-dp-pll-10nm.c

+3 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

 */



/*
@@ -66,7 +66,7 @@ 
#include "mdss-dp-pll-10nm.h"



static struct dp_pll_db dp_pdb;

static const struct clk_ops mux_clk_ops;

static struct clk_ops mux_clk_ops;



static struct regmap_config dp_pll_10nm_cfg = {

	.reg_bits	= 32,
@@ -236,7 +236,7 @@ int dp_pll_clock_register_10nm(struct platform_device *pdev, 
	struct regmap *regmap;

	int num_clks = ARRAY_SIZE(mdss_dp_pllcc_10nm);



	clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk__data), GFP_KERNEL);

	clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);

	if (!clk_data)

		return -ENOMEM;

drivers/clk/qcom/mdss/mdss-dp-pll-14nm.c

+2 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

 */



/*
@@ -58,7 +58,7 @@ v----------+----------v | divsel_two | | divsel_four | 
#include "mdss-dp-pll-14nm.h"



static struct dp_pll_db dp_pdb;

static const struct clk_ops mux_clk_ops;

static struct clk_ops mux_clk_ops;



static struct regmap_config dp_pll_14nm_cfg = {

	.reg_bits	= 32,

drivers/clk/qcom/mdss/mdss-dp-pll-7nm.c

+2 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

 */



/*
@@ -66,7 +66,7 @@ 
#include "mdss-dp-pll-7nm.h"



static struct dp_pll_db_7nm dp_pdb_7nm;

static const struct clk_ops mux_clk_ops;

static struct clk_ops mux_clk_ops;



static struct regmap_config dp_pll_7nm_cfg = {

	.reg_bits	= 32,

drivers/clk/qcom/mdss/mdss-dsi-pll-28lpm.c

+2 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.

 */



#define pr_fmt(fmt)	"%s: " fmt, __func__
@@ -435,7 +435,7 @@ int dsi_pll_clock_register_28lpm(struct platform_device *pdev, 
	if (!clk_data)

		return -ENOMEM;



	clk_data->clks = devm_kcalloc(&pdev->dev, num_clks

	clk_data->clks = devm_kcalloc(&pdev->dev, num_clks,

				sizeof(struct clk *), GFP_KERNEL);

	if (!clk_data->clks)

		return -ENOMEM;