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Commit 9b3ad363 authored by Alim Akhtar's avatar Alim Akhtar Committed by Sylwester Nawrocki
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clk: samsung: exynos7: Correct CMU_TOP1 clocks names 



This patch renames CMU_TOP1 clocks names to match with user manual.

Signed-off-by: default avatarAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
parent cf5ee64c

drivers/clk/samsung/clk-exynos7.c

+27 −23
Original line number Diff line number Diff line
@@ -414,23 +414,23 @@ CLK_OF_DECLARE(exynos7_clk_top0, "samsung,exynos7-clock-top0", 
#define ENABLE_SCLK_TOP1_FSYS11		0x0A2C



/* List of parent clocks for Muxes in CMU_TOP1 */

PNAME(mout_top1_bus0_pll_p)	= { "fin_pll", "dout_sclk_bus0_pll" };

PNAME(mout_top1_bus1_pll_p)	= { "fin_pll", "dout_sclk_bus1_pll_b" };

PNAME(mout_top1_cc_pll_p)	= { "fin_pll", "dout_sclk_cc_pll_b" };

PNAME(mout_top1_mfc_pll_p)	= { "fin_pll", "dout_sclk_mfc_pll_b" };

PNAME(mout_top1_bus0_pll_user_p)	= { "fin_pll", "sclk_bus0_pll_b" };

PNAME(mout_top1_bus1_pll_user_p)	= { "fin_pll", "sclk_bus1_pll_b" };

PNAME(mout_top1_cc_pll_user_p)	= { "fin_pll", "sclk_cc_pll_b" };

PNAME(mout_top1_mfc_pll_user_p)	= { "fin_pll", "sclk_mfc_pll_b" };



PNAME(mout_top1_half_bus0_pll_p) = {"mout_top1_bus0_pll",

PNAME(mout_top1_bus0_pll_half_p) = {"mout_top1_bus0_pll_user",

	"ffac_top1_bus0_pll_div2"};

PNAME(mout_top1_half_bus1_pll_p) = {"mout_top1_bus1_pll",

PNAME(mout_top1_bus1_pll_half_p) = {"mout_top1_bus1_pll_user",

	"ffac_top1_bus1_pll_div2"};

PNAME(mout_top1_half_cc_pll_p) = {"mout_top1_cc_pll",

PNAME(mout_top1_cc_pll_half_p) = {"mout_top1_cc_pll_user",

	"ffac_top1_cc_pll_div2"};

PNAME(mout_top1_half_mfc_pll_p) = {"mout_top1_mfc_pll",

PNAME(mout_top1_mfc_pll_half_p) = {"mout_top1_mfc_pll_user",

	"ffac_top1_mfc_pll_div2"};



PNAME(mout_top1_group1) = {"mout_top1_half_bus0_pll",

	"mout_top1_half_bus1_pll", "mout_top1_half_cc_pll",

	"mout_top1_half_mfc_pll"};

PNAME(mout_top1_group1) = {"mout_top1_bus0_pll_half",

	"mout_top1_bus1_pll_half", "mout_top1_cc_pll_half",

	"mout_top1_mfc_pll_half"};



static unsigned long top1_clk_regs[] __initdata = {

	MUX_SEL_TOP10,
@@ -450,20 +450,22 @@ static unsigned long top1_clk_regs[] __initdata = { 
};



static struct samsung_mux_clock top1_mux_clks[] __initdata = {

	MUX(0, "mout_top1_mfc_pll", mout_top1_mfc_pll_p, MUX_SEL_TOP10, 4, 1),

	MUX(0, "mout_top1_cc_pll", mout_top1_cc_pll_p, MUX_SEL_TOP10, 8, 1),

	MUX(0, "mout_top1_bus1_pll", mout_top1_bus1_pll_p,

	MUX(0, "mout_top1_mfc_pll_user", mout_top1_mfc_pll_user_p,

		MUX_SEL_TOP10, 4, 1),

	MUX(0, "mout_top1_cc_pll_user", mout_top1_cc_pll_user_p,

		MUX_SEL_TOP10, 8, 1),

	MUX(0, "mout_top1_bus1_pll_user", mout_top1_bus1_pll_user_p,

		MUX_SEL_TOP10, 12, 1),

	MUX(0, "mout_top1_bus0_pll", mout_top1_bus0_pll_p,

	MUX(0, "mout_top1_bus0_pll_user", mout_top1_bus0_pll_user_p,

		MUX_SEL_TOP10, 16, 1),



	MUX(0, "mout_top1_half_mfc_pll", mout_top1_half_mfc_pll_p,

	MUX(0, "mout_top1_mfc_pll_half", mout_top1_mfc_pll_half_p,

		MUX_SEL_TOP11, 4, 1),

	MUX(0, "mout_top1_half_cc_pll", mout_top1_half_cc_pll_p,

	MUX(0, "mout_top1_cc_pll_half", mout_top1_cc_pll_half_p,

		MUX_SEL_TOP11, 8, 1),

	MUX(0, "mout_top1_half_bus1_pll", mout_top1_half_bus1_pll_p,

	MUX(0, "mout_top1_bus1_pll_half", mout_top1_bus1_pll_half_p,

		MUX_SEL_TOP11, 12, 1),

	MUX(0, "mout_top1_half_bus0_pll", mout_top1_half_bus0_pll_p,

	MUX(0, "mout_top1_bus0_pll_half", mout_top1_bus0_pll_half_p,

		MUX_SEL_TOP11, 16, 1),



	MUX(0, "mout_aclk_fsys1_200", mout_top1_group1, MUX_SEL_TOP13, 24, 2),
@@ -507,10 +509,12 @@ static struct samsung_gate_clock top1_gate_clks[] __initdata = { 
};



static struct samsung_fixed_factor_clock top1_fixed_factor_clks[] __initdata = {

	FFACTOR(0, "ffac_top1_bus0_pll_div2", "mout_top1_bus0_pll", 1, 2, 0),

	FFACTOR(0, "ffac_top1_bus1_pll_div2", "mout_top1_bus1_pll", 1, 2, 0),

	FFACTOR(0, "ffac_top1_cc_pll_div2", "mout_top1_cc_pll", 1, 2, 0),

	FFACTOR(0, "ffac_top1_mfc_pll_div2", "mout_top1_mfc_pll", 1, 2, 0),

	FFACTOR(0, "ffac_top1_bus0_pll_div2", "mout_top1_bus0_pll_user",

		1, 2, 0),

	FFACTOR(0, "ffac_top1_bus1_pll_div2", "mout_top1_bus1_pll_user",

		1, 2, 0),

	FFACTOR(0, "ffac_top1_cc_pll_div2", "mout_top1_cc_pll_user", 1, 2, 0),

	FFACTOR(0, "ffac_top1_mfc_pll_div2", "mout_top1_mfc_pll_user", 1, 2, 0),

};



static struct samsung_cmu_info top1_cmu_info __initdata = {