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Commit 9205db55 authored by Linux Build Service Account's avatar Linux Build Service Account
Browse files

Merge 283e37c3 on remote branch

Change-Id: I8358df9e96c4249c403a31a16c2c2cebd742502e
parents edf58942 283e37c3
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+6 −0
Original line number Diff line number Diff line
@@ -192,6 +192,9 @@ static void cam_cci_dump_registers(struct cci_device *cci_dev,
	uint32_t reg_offset = 0;
	void __iomem *base = cci_dev->soc_info.reg_map[0].mem_base;

	CAM_INFO(CAM_CCI, "**** CCI:%d register dump ****",
		cci_dev->soc_info->index);

	/* CCI Top Registers */
	CAM_INFO(CAM_CCI, "****CCI TOP Registers ****");
	for (i = 0; i < DEBUG_TOP_REG_COUNT; i++) {
@@ -205,6 +208,9 @@ static void cam_cci_dump_registers(struct cci_device *cci_dev,
	CAM_INFO(CAM_CCI, "****CCI MASTER %d Registers ****",
		master);
	for (i = 0; i < DEBUG_MASTER_REG_COUNT; i++) {
		if ((i * 4) == 0x18)
			continue;

		reg_offset = DEBUG_MASTER_REG_START + master*0x100 + i * 4;
		read_val = cam_io_r_mb(base + reg_offset);
		CAM_INFO(CAM_CCI, "offset = 0x%X value = 0x%X",
+14 −4
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
 */

#ifndef _CAM_CSIPHY_1_2_HWREG_H_
@@ -14,7 +14,7 @@ struct csiphy_reg_parms_t csiphy_v1_2 = {
	.mipi_csiphy_glbl_irq_cmd_addr = 0x828,
	.csiphy_common_array_size = 7,
	.csiphy_reset_array_size = 5,
	.csiphy_2ph_config_array_size = 18,
	.csiphy_2ph_config_array_size = 19,
	.csiphy_3ph_config_array_size = 33,
	.csiphy_2ph_clock_lane = 0x1,
	.csiphy_2ph_combo_ck_ln = 0x10,
@@ -73,6 +73,7 @@ csiphy_reg_t csiphy_2ph_v1_2_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0064, 0x7F, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0730, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -93,6 +94,7 @@ csiphy_reg_t csiphy_2ph_v1_2_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0230, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -113,6 +115,7 @@ csiphy_reg_t csiphy_2ph_v1_2_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0264, 0x7F, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -133,6 +136,7 @@ csiphy_reg_t csiphy_2ph_v1_2_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0464, 0x7F, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0630, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -153,6 +157,7 @@ csiphy_reg_t csiphy_2ph_v1_2_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x065C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0660, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0664, 0x7F, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
};

@@ -177,6 +182,7 @@ csiphy_2ph_v1_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0064, 0x7F, 0x00, CSIPHY_DNP_PARAMS},
		{0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0730, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -197,6 +203,7 @@ csiphy_2ph_v1_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0230, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -217,13 +224,15 @@ csiphy_2ph_v1_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0264, 0x7F, 0x00, CSIPHY_DNP_PARAMS},
		{0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
	{
		{0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0418, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x041C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0428, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -250,13 +259,14 @@ csiphy_2ph_v1_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
		{0x0600, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0620, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0624, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0624, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0608, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
		{0x060C, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0638, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
		{0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS},
	},
};