Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit 914a76ca authored by Andi Kleen's avatar Andi Kleen Committed by Robert Richter
Browse files

oprofile, x86: Allow setting EDGE/INV/CMASK for counter events



For some performance events it's useful to set the EDGE and INV
bits and the CMASK mask in the counter control register. The list
of predefined events Intel releases for each CPU has some events which
require these settings to get more "natural" to use higher level events.

oprofile currently doesn't allow this.

This patch adds new extra configuration fields for them, so that
they can be specified in oprofilefs.

An updated oprofile daemon can then make use of this to set them.

v2: Write back masked extra value to variable.

Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
parent ec6b426c
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment