clk: qcom: mdss: fix blank / un-blank issue for DSI 12nm pll

During blank, cache the pll mux registers for pixel_clk_src clock.
These cached values need to be programmed during unblank where
the clock framework does not call the mux func to re-configure
the mux values.
For splash disabled case, change the clk width value to select
correct clock divider for pxl clk.

Change-Id: I1f6258a11d17cc85d43ea74bf50c108e2943984a
Signed-off-by: Raghavendra Ambadas <rambad@codeaurora.org>