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Commit 86c1b9ef authored by Eric Anholt's avatar Eric Anholt
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drm/vc4: Adjust modes in DSI to work around the integer PLL divider.



BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel
clocks, so to support panels on the Raspberry Pi we need to set a
higher pixel clock rate than requested and adjust the mode we program
to extend out the HFP so that the refresh rate matches.

v2: Drop an unfinished comment (caught by Noralf)

Signed-off-by: default avatarEric Anholt <eric@anholt.net>
Link: http://patchwork.freedesktop.org/patch/msgid/20170511235625.22427-2-eric@anholt.net


Acked-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fdb888de
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