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Commit 85f80cb3 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
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drm/amd/pp: Add gfx pg support in smu through set_powergating_by_smu 



gfx ip block can call set_powergating_by_smu to set gfx pg state if
necessary.

Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b92c6287

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+4 −6
Original line number Diff line number Diff line
@@ -5606,14 +5606,12 @@ static int gfx_v8_0_late_init(void *handle) 
static void gfx_v8_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,

						       bool enable)

{

	if ((adev->asic_type == CHIP_POLARIS11) ||

	if (((adev->asic_type == CHIP_POLARIS11) ||

	    (adev->asic_type == CHIP_POLARIS12) ||

	    (adev->asic_type == CHIP_VEGAM))

	    (adev->asic_type == CHIP_VEGAM)) &&

	    adev->powerplay.pp_funcs->set_powergating_by_smu)

		/* Send msg to SMU via Powerplay */

		amdgpu_device_ip_set_powergating_state(adev,

						       AMD_IP_BLOCK_TYPE_SMC,

						       enable ?

						       AMD_PG_STATE_GATE : AMD_PG_STATE_UNGATE);

		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, enable);



	WREG32_FIELD(RLC_PG_CNTL, STATIC_PER_CU_PG_ENABLE, enable ? 1 : 0);

}

drivers/gpu/drm/amd/powerplay/amd_powerplay.c

+17 −8
Original line number Diff line number Diff line
@@ -236,14 +236,7 @@ static int pp_set_powergating_state(void *handle, 
			pr_err("gfx off control failed!\n");

	}



	if (hwmgr->hwmgr_func->powergate_gfx == NULL) {

		pr_info("%s was not implemented.\n", __func__);

	return 0;

	}



	/* Enable/disable GFX per cu powergating through SMU */

	return hwmgr->hwmgr_func->powergate_gfx(hwmgr,

			state == AMD_PG_STATE_GATE);



}
@@ -1184,6 +1177,21 @@ static int pp_dpm_powergate_mmhub(void *handle) 
	return hwmgr->hwmgr_func->powergate_mmhub(hwmgr);

}



static int pp_dpm_powergate_gfx(void *handle, bool gate)

{

	struct pp_hwmgr *hwmgr = handle;



	if (!hwmgr || !hwmgr->pm_en)

		return 0;



	if (hwmgr->hwmgr_func->powergate_gfx == NULL) {

		pr_info("%s was not implemented.\n", __func__);

		return 0;

	}



	return hwmgr->hwmgr_func->powergate_gfx(hwmgr, gate);

}



static int pp_set_powergating_by_smu(void *handle,

				uint32_t block_type, bool gate)

{
@@ -1201,6 +1209,7 @@ static int pp_set_powergating_by_smu(void *handle, 
		pp_dpm_powergate_mmhub(handle);

		break;

	case AMD_IP_BLOCK_TYPE_GFX:

		ret = pp_dpm_powergate_gfx(handle, gate);

		break;

	default:

		break;