Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 807249d3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for 4.3 for MIPS.  Here's the summary:

  Three fixes that didn't make 4.2-stable:

   - a -Os build might compile the kernel using the MIPS16 instruction
     set but the R2 optimized inline functions in <uapi/asm/swab.h> are
     implemented using 32-bit wide instructions which is invalid.

   - a build error in pgtable-bits.h for a particular kernel
     configuration.

   - accessing registers of the CM GCR might have been compiled to use
     64 bit accesses but these registers are onl 32 bit wide.

  And also a few new bits:

   - move the ATH79 GPIO driver to drivers/gpio

   - the definition of IRQCHIP_DECLARE has moved to linux/irqchip.h,
     change ATH79 accordingly.

   - fix definition of pgprot_writecombine

   - add an implementation of dma_map_ops.mmap

   - fix alignment of quiet build output for vmlinuz link

   - BCM47xx: Use kmemdup rather than duplicating its implementation

   - Netlogic: Fix 0x0x prefixes of constants.

   - merge Bjorn Helgaas' series to remove most of the weak keywords
     from function declarations.

   - CP0 and CP1 registers are best considered treated as unsigned
     values to avoid large values from becoming negative values.

   - improve support for the MIPS GIC timer.

   - enable common clock framework for Malta and SEAD3.

   - a number of improvments and fixes to dump_tlb().

   - document the MIPS TLB dump functionality in Magic SysRq.

   - Cavium Octeon CN68XX improvments.

   - NetLogic improvments.

   - irq: Use access helper irq_data_get_affinity_mask.

   - handle MSA unaligned accesses.

   - a number of R6-related math-emu fixes.

   - support for I6400.

   - improvments to MSA support.

   - add uprobes support.

   - move from deprecated __initcall to arch_initcall.

   - remove finish_arch_switch().

   - IRQ cleanups by Thomas Gleixner.

   - migrate to new 'set-state' interface.

   - random small cleanups"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (148 commits)
  MIPS: UAPI: Fix unrecognized opcode WSBH/DSBH/DSHD when using MIPS16.
  MIPS: Fix alignment of quiet build output for vmlinuz link
  MIPS: math-emu: Remove unused handle_dsemul function declaration
  MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 SELEQZ FPU instruction
  MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction
  MIPS: inst.h: Add new MIPS R6 FPU opcodes
  MIPS: Octeon: Fix management port MII address on Kontron S1901
  MIPS: BCM47xx: Use kmemdup rather than duplicating its implementation
  STAGING: Octeon: Use common helpers for determining interface and port
  MIPS: Octeon: Support interfaces 4 and 5
  MIPS: Octeon: Set up 1:1 mapping between CN68XX PKO queues and ports
  MIPS: Octeon: Initialize CN68XX PKO
  STAGING: Octeon: Support CN68XX style WQE
  ...
parents ff474e8c 2db97045
Loading
Loading
Loading
Loading
+28 −0
Original line number Diff line number Diff line
* Pistachio general-purpose timer based clocksource

Required properties:
 - compatible: "img,pistachio-gptimer".
 - reg: Address range of the timer registers.
 - interrupts: An interrupt for each of the four timers
 - clocks: Should contain a clock specifier for each entry in clock-names
 - clock-names: Should contain the following entries:
                "sys", interface clock
                "slow", slow counter clock
                "fast", fast counter clock
 - img,cr-periph: Must contain a phandle to the peripheral control
		  syscon node.

Example:
	timer: timer@18102000 {
		compatible = "img,pistachio-gptimer";
		reg = <0x18102000 0x100>;
		interrupts = <GIC_SHARED 60 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SHARED 61 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SHARED 62 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SHARED 63 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>,
		         <&clk_periph PERIPH_CLK_COUNTER_SLOW>,
			 <&cr_periph SYS_CLK_TIMER>;
		clock-names = "fast", "slow", "sys";
		img,cr-periph = <&cr_periph>;
	};
+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@
    |        m68k: | TODO |
    |       metag: | TODO |
    |  microblaze: | TODO |
    |        mips: | TODO |
    |        mips: |  ok  |
    |     mn10300: | TODO |
    |       nios2: | TODO |
    |    openrisc: | TODO |
+1 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ On all - write a character to /proc/sysrq-trigger. e.g.:

'x'	- Used by xmon interface on ppc/powerpc platforms.
          Show global PMU Registers on sparc64.
          Dump all TLB entries on MIPS.

'y'	- Show global CPU Registers [SPARC-64 specific]

+17 −8
Original line number Diff line number Diff line
config MIPS
	bool
	default y
	select ARCH_SUPPORTS_UPROBES
	select ARCH_MIGHT_HAVE_PC_PARPORT
	select ARCH_MIGHT_HAVE_PC_SERIO
	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
	select HAVE_CONTEXT_TRACKING
	select HAVE_GENERIC_DMA_COHERENT
	select HAVE_IDE
@@ -13,7 +15,6 @@ config MIPS
	select HAVE_ARCH_SECCOMP_FILTER
	select HAVE_ARCH_TRACEHOOK
	select HAVE_BPF_JIT if !CPU_MICROMIPS
	select ARCH_HAVE_CUSTOM_GPIO_H
	select HAVE_FUNCTION_TRACER
	select HAVE_DYNAMIC_FTRACE
	select HAVE_FTRACE_MCOUNT_RECORD
@@ -409,6 +410,7 @@ config MIPS_MALTA
	select CEVT_R4K
	select CSRC_R4K
	select CLKSRC_MIPS_GIC
	select COMMON_CLK
	select DMA_MAYBE_COHERENT
	select GENERIC_ISA_DMA
	select HAVE_PCSPKR_PLATFORM
@@ -459,6 +461,7 @@ config MIPS_SEAD3
	select CEVT_R4K
	select CSRC_R4K
	select CLKSRC_MIPS_GIC
	select COMMON_CLK
	select CPU_MIPSR2_IRQ_VI
	select CPU_MIPSR2_IRQ_EI
	select DMA_NONCOHERENT
@@ -899,6 +902,7 @@ config NLM_XLP_BOARD
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_64BIT_KERNEL
	select ARCH_PHYS_ADDR_T_64BIT
	select ARCH_REQUIRE_GPIOLIB
	select SYS_SUPPORTS_BIG_ENDIAN
	select SYS_SUPPORTS_LITTLE_ENDIAN
	select SYS_SUPPORTS_HIGHMEM
@@ -948,6 +952,7 @@ source "arch/mips/jazz/Kconfig"
source "arch/mips/jz4740/Kconfig"
source "arch/mips/lantiq/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pistachio/Kconfig"
source "arch/mips/pmcs-msp71xx/Kconfig"
source "arch/mips/ralink/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
@@ -1041,6 +1046,9 @@ config FW_CFE
config ARCH_DMA_ADDR_T_64BIT
	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT

config ARCH_SUPPORTS_UPROBES
	bool

config DMA_MAYBE_COHERENT
	select DMA_NONCOHERENT
	bool
@@ -1364,7 +1372,7 @@ config CPU_MIPS32_R2
	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.

config CPU_MIPS32_R6
	bool "MIPS32 Release 6 (EXPERIMENTAL)"
	bool "MIPS32 Release 6"
	depends on SYS_HAS_CPU_MIPS32_R6
	select CPU_HAS_PREFETCH
	select CPU_SUPPORTS_32BIT_KERNEL
@@ -1415,7 +1423,7 @@ config CPU_MIPS64_R2
	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.

config CPU_MIPS64_R6
	bool "MIPS64 Release 6 (EXPERIMENTAL)"
	bool "MIPS64 Release 6"
	depends on SYS_HAS_CPU_MIPS64_R6
	select CPU_HAS_PREFETCH
	select CPU_SUPPORTS_32BIT_KERNEL
@@ -1965,6 +1973,7 @@ config 32BIT
	select TRAD_SIGNALS
	help
	  Select this option if you want to build a 32-bit kernel.

config 64BIT
	bool "64-bit kernel"
	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
@@ -2110,7 +2119,7 @@ config CPU_R4K_CACHE_TLB

config MIPS_MT_SMP
	bool "MIPS MT SMP support (1 TC on each available VPE)"
	depends on SYS_SUPPORTS_MULTITHREADING
	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
	select CPU_MIPSR2_IRQ_VI
	select CPU_MIPSR2_IRQ_EI
	select SYNC_R4K
@@ -2211,7 +2220,7 @@ config MIPS_VPE_APSP_API_MT

config MIPS_CMP
	bool "MIPS CMP framework support (DEPRECATED)"
	depends on SYS_SUPPORTS_MIPS_CMP
	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
	select MIPS_GIC_IPI
	select SMP
	select SYNC_R4K
@@ -2228,7 +2237,7 @@ config MIPS_CMP

config MIPS_CPS
	bool "MIPS Coherent Processing System support"
	depends on SYS_SUPPORTS_MIPS_CPS
	depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
	select MIPS_CM
	select MIPS_CPC
	select MIPS_CPS_PM if HOTPLUG_CPU
@@ -2303,7 +2312,7 @@ config CPU_MICROMIPS
endchoice

config CPU_HAS_MSA
	bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)"
	bool "Support for the MIPS SIMD Architecture"
	depends on CPU_SUPPORTS_MSA
	depends on 64BIT || MIPS_O32_FP64_SUPPORT
	help
@@ -2643,7 +2652,7 @@ config SECCOMP
	  If unsure, say Y. Only embedded should say N here.

config MIPS_O32_FP64_SUPPORT
	bool "Support for O32 binaries using 64-bit FP (EXPERIMENTAL)"
	bool "Support for O32 binaries using 64-bit FP"
	depends on 32BIT || MIPS32_O32
	help
	  When this is enabled, the kernel will support use of 64-bit floating
+0 −9
Original line number Diff line number Diff line
@@ -87,15 +87,6 @@ config SB1XXX_CORELIS
	  Select compile flags that produce code that can be processed by the
	  Corelis mksym utility and UDB Emulator.

config RUNTIME_DEBUG
	bool "Enable run-time debugging"
	depends on DEBUG_KERNEL
	help
	  If you say Y here, some debugging macros will do run-time checking.
	  If you say N here, those macros will mostly turn to no-ops.  See
	  arch/mips/include/asm/debug.h for debugging macros.
	  If unsure, say N.

config DEBUG_ZBOOT
	bool "Enable compressed kernel support debugging"
	depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT
Loading