Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7ec280c5 authored by Jesper Nilsson's avatar Jesper Nilsson
Browse files

CRIS: Update for ARTPEC-3 



Signed-off-by: default avatarJesper Nilsson <jesper.nilsson@axis.com>
parent 98560bd8

arch/cris/arch-v32/mm/init.c

+18 −5
Original line number Diff line number Diff line
@@ -27,8 +27,7 @@ extern void tlb_init(void); 
 * at kseg_4 thus the ksegs are set up again. Also clear the TLB and do various

 * other paging stuff.

 */

void __init

cris_mmu_init(void)

void __init cris_mmu_init(void)

{

	unsigned long mmu_config;

	unsigned long mmu_kbase_hi;
@@ -55,14 +54,23 @@ cris_mmu_init(void) 
	/* Initialise the TLB. Function found in tlb.c. */

	tlb_init();



	/* Enable exceptions and initialize the kernel segments. */

	/*

	 * Enable exceptions and initialize the kernel segments.

	 * See head.S for differences between ARTPEC-3 and ETRAX FS.

	 */

	mmu_config = ( REG_STATE(mmu, rw_mm_cfg, we, on)        |

		       REG_STATE(mmu, rw_mm_cfg, acc, on)       |

		       REG_STATE(mmu, rw_mm_cfg, ex, on)        |

		       REG_STATE(mmu, rw_mm_cfg, inv, on)       |

#ifdef CONFIG_CRIS_MACH_ARTPEC3

		       REG_STATE(mmu, rw_mm_cfg, seg_f, page)   |

		       REG_STATE(mmu, rw_mm_cfg, seg_e, page)   |

		       REG_STATE(mmu, rw_mm_cfg, seg_d, linear) |

#else

		       REG_STATE(mmu, rw_mm_cfg, seg_f, linear) |

		       REG_STATE(mmu, rw_mm_cfg, seg_e, linear) |

		       REG_STATE(mmu, rw_mm_cfg, seg_d, page)   |

#endif

		       REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |

		       REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |

#ifndef CONFIG_ETRAX_VCS_SIM
@@ -81,9 +89,15 @@ cris_mmu_init(void) 
		       REG_STATE(mmu, rw_mm_cfg, seg_1, page)   |

		       REG_STATE(mmu, rw_mm_cfg, seg_0, page));



	/* See head.S for differences between ARTPEC-3 and ETRAX FS. */

	mmu_kbase_hi = ( REG_FIELD(mmu, rw_mm_kbase_hi, base_f, 0x0) |

#ifdef CONFIG_CRIS_MACH_ARTPEC3

			 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x0) |

			 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x5) |

#else

			 REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 0x8) |

			 REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 0x0) |

#endif

                         REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0x4) |

			 REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) |

#ifndef CONFIG_ETRAX_VCS_SIM
@@ -129,8 +143,7 @@ cris_mmu_init(void) 
	SUPP_REG_WR(RW_GC_CFG, 0xf); /* IMMU, DMMU, ICache, DCache on */

}



void __init

paging_init(void)

void __init paging_init(void)

{

	int i;

	unsigned long zones_size[MAX_NR_ZONES];