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Commit 7b58001d authored by Sunil Paidimarri's avatar Sunil Paidimarri Committed by Gerrit - the friendly Code Review server
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data-kernel: EMAC: Store context for debugger



Store context for debugger.
Fixed compiler warning.

Change-Id: I7ac2c563691d73c6197d6c494639f91f7c11d7aa
CRs_Fixed: 2281184
Acked-by: default avatarRahul Kawadgave <rahulak@qti.qualcomm.com>
Signed-off-by: default avatarSunil Paidimarri <hisunil@codeaurora.org>
parent 30346688
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+11 −0
Original line number Diff line number Diff line
@@ -527,9 +527,20 @@ static void DWC_ETH_QOS_restart_dev(struct DWC_ETH_QOS_prv_data *pdata,
	struct desc_if_struct *desc_if = &pdata->desc_if;
	struct hw_if_struct *hw_if = &pdata->hw_if;
	struct DWC_ETH_QOS_rx_queue *rx_queue = NULL;
	int reg_val;

	DBGPR("-->DWC_ETH_QOS_restart_dev\n");

	EMACERR("FBE received for queue = %d\n", qinx);
	DMA_CHTDR_CURTDESAPTR_UDFRD(qinx, reg_val);
	EMACERR("EMAC_DMA_CHi_CURRENT_APP_TXDESC = %#x\n", reg_val);
	DMA_CHRDR_CURRDESAPTR_UDFRD(qinx, reg_val);
	EMACERR("EMAC_DMA_CHi_CURRENT_APP_RXDESC = %#x\n", reg_val);
	DMA_CHTBAR_CURTBUFAPTR_UDFRD(qinx, reg_val);
	EMACERR("EMAC_DMA_CHi_CURRENT_APP_TXBUFFER = %#x\n", reg_val);
	DMA_CHRBAR_CURRBUFAPTR_UDFRD(qinx, reg_val);
	EMACERR("EMAC_DMA_CHi_CURRENT_APP_RXBUFFER = %#x\n", reg_val);

	netif_stop_subqueue(pdata->dev, qinx);

	/* stop DMA TX */
+21 −2
Original line number Diff line number Diff line
@@ -836,9 +836,26 @@ static int DWC_ETH_QOS_panic_notifier(struct notifier_block *this,
		unsigned long event, void *ptr)
{
	if (gDWC_ETH_QOS_prv_data) {
		DBGPR("DWC_ETH_QOS: 0x%pK\n", gDWC_ETH_QOS_prv_data);
		EMACINFO("gDWC_ETH_QOS_prv_data 0x%p\n", gDWC_ETH_QOS_prv_data);
		DWC_ETH_QOS_ipa_stats_read(gDWC_ETH_QOS_prv_data);
		DWC_ETH_QOS_dma_desc_stats_read(gDWC_ETH_QOS_prv_data);

		gDWC_ETH_QOS_prv_data->iommu_domain = emac_emb_smmu_ctx.iommu_domain;
		EMACINFO("emac iommu domain 0x%p\n", gDWC_ETH_QOS_prv_data->iommu_domain);

		gDWC_ETH_QOS_prv_data->emac_reg_base_address =
			(unsigned int *)kzalloc(dwc_eth_qos_res_data.emac_mem_size, GFP_KERNEL);
		EMACINFO("emac register mem 0x%p\n", gDWC_ETH_QOS_prv_data->emac_reg_base_address);
		if (gDWC_ETH_QOS_prv_data->emac_reg_base_address != NULL)
			memcpy(gDWC_ETH_QOS_prv_data->emac_reg_base_address, (void*)dwc_eth_qos_base_addr,
				   dwc_eth_qos_res_data.emac_mem_size);

		gDWC_ETH_QOS_prv_data->rgmii_reg_base_address =
			(unsigned int *)kzalloc(dwc_eth_qos_res_data.rgmii_mem_size, GFP_KERNEL);
		EMACINFO("rgmii register mem 0x%p\n", gDWC_ETH_QOS_prv_data->rgmii_reg_base_address);
		if (gDWC_ETH_QOS_prv_data->rgmii_reg_base_address != NULL)
			memcpy(gDWC_ETH_QOS_prv_data->rgmii_reg_base_address, (void*)dwc_rgmii_io_csr_base_addr,
				   dwc_eth_qos_res_data.rgmii_mem_size);
	}
	return NOTIFY_DONE;
}
@@ -1131,7 +1148,6 @@ static int DWC_ETH_QOS_configure_netdevice(struct platform_device *pdev)
	pdata->io_macro_tx_mode_non_id =
		dwc_eth_qos_res_data.io_macro_tx_mode_non_id;
	pdata->io_macro_phy_intf = dwc_eth_qos_res_data.io_macro_phy_intf;

#ifdef DWC_ETH_QOS_CONFIG_DEBUGFS
	/* to give prv data to debugfs */
	DWC_ETH_QOS_get_pdata(pdata);
@@ -1424,6 +1440,9 @@ static int emac_emb_smmu_cb_probe(struct platform_device *pdev)
		goto err_smmu_probe;
	}

	emac_emb_smmu_ctx.iommu_domain =
		iommu_get_domain_for_dev(&emac_emb_smmu_ctx.smmu_pdev->dev);

	EMACDBG("Successfully attached to IOMMU\n");
	if (emac_emb_smmu_ctx.pdev_master) {
		result = DWC_ETH_QOS_configure_netdevice(emac_emb_smmu_ctx.pdev_master);
+6 −1
Original line number Diff line number Diff line
@@ -1781,6 +1781,11 @@ struct DWC_ETH_QOS_prv_data {

	/* Work struct for handling phy interrupt */
	struct work_struct emac_phy_work;

	/* Context variabled used for debugger */
	struct iommu_domain *iommu_domain;
	unsigned int *emac_reg_base_address;
	unsigned int *rgmii_reg_base_address;
};

typedef enum {
@@ -1806,7 +1811,7 @@ struct emac_emb_smmu_cb_ctx {
	struct platform_device *pdev_master;
	struct platform_device *smmu_pdev;
	struct dma_iommu_mapping *mapping;
	struct iommu_domain *iommu;
	struct iommu_domain *iommu_domain;
	u32 va_start;
	u32 va_size;
	u32 va_end;