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Commit 7690154b authored by Aditya Bavanari's avatar Aditya Bavanari Committed by Gerrit - the friendly Code Review server
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asoc: codecs: Do not update VA clk muxsel register



Because of a HW limitation in DSP, while switching
RCG from TX MCLK to VA MCLK for SVA use cases
a glitch is seen on AHB bus leading to data
corruption in registers.
So, while doing a mux switch for VA RCG clock selection,
do not configure the muxsel register in HLOS as it is
taken care in DSP itself as a workaround for HW limitation.

Change-Id: Iccbe714397796259fa55f9852ece387e949b12e8
Signed-off-by: default avatarAditya Bavanari <abavanar@codeaurora.org>
parent 1542965d
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