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Commit 6fb52b6c authored by Hemant Kumar's avatar Hemant Kumar
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mhi: core: Make sure reg_write_q stores visible to other cores



mhi_reg_write_enqueue API stores reg, val and valid which can go
out of order. In case valid is set to true before val is set,
offload worker running on another core ends up writing stale value
to register. Another possibility is valid being set to true but not
visible to other cores. When offload worker gets a chance to run,
this results into skipping register write. Fix these issues by
adding smp_wmb() between stores of val and valid and another after
valid is set.

Change-Id: I3b930e7fad4252d34386de525491f94997b34f36
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
parent 84b56d3a
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