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Commit 6d08b9b9 authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville
Browse files

ath9k: add udelay() for AR5416 on ath9k_hw_configpcipowersave()



We need the udelay() for all families, including AR5416.

Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 24c1a280
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+2 −2
Original line number Original line Diff line number Diff line
@@ -2666,7 +2666,6 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
			REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0),
			REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0),
				  INI_RA(&ah->iniPcieSerdes, i, 1));
				  INI_RA(&ah->iniPcieSerdes, i, 1));
		}
		}
		udelay(1000);
	} else if (AR_SREV_9280(ah) &&
	} else if (AR_SREV_9280(ah) &&
		   (ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) {
		   (ah->hw_version.macRev == AR_SREV_REVISION_9280_10)) {
		REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);
		REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);
@@ -2690,7 +2689,6 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
		/* Load the new settings */
		/* Load the new settings */
		REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
		REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);


		udelay(1000);
	} else {
	} else {
		REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
		REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);
		REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
		REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);
@@ -2714,6 +2712,8 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore)
		REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
		REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
	}
	}


	udelay(1000);

	/* set bit 19 to allow forcing of pcie core into L1 state */
	/* set bit 19 to allow forcing of pcie core into L1 state */
	REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
	REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);