Merge "clk: qcom: clk-rcg2: Read RCG source before calculating clk rate" (65ea258f) · Commits · e / devices / android_kernel_fairphone_FP4

arch/arm64/boot/dts/qcom/kona-bus.dtsi

+6 −0

Original line number	Diff line number	Diff line
		@@ -1501,6 +1501,8 @@
		qcom,agg-ports = <1>;
		qcom,bus-dev = <&fab_config_noc>;
		qcom,bcms = <&bcm_cn0>;
		mmcx-supply = <&VDD_MMCX_LEVEL>;
		node-reg-names = "mmcx";
		};

		slv_qhs_clk_ctl:slv-qhs-clk-ctl {
		@@ -1592,6 +1594,8 @@
		qcom,agg-ports = <1>;
		qcom,bus-dev = <&fab_config_noc>;
		qcom,bcms = <&bcm_cn0>;
		mmcx-supply = <&VDD_MMCX_LEVEL>;
		node-reg-names = "mmcx";
		};

		slv_qhs_gpuss_cfg:slv-qhs-gpuss-cfg {
		@@ -1874,6 +1878,8 @@
		qcom,agg-ports = <1>;
		qcom,bus-dev = <&fab_config_noc>;
		qcom,bcms = <&bcm_cn0>;
		mmcx-supply = <&VDD_MMCX_LEVEL>;
		node-reg-names = "mmcx";
		};

		slv_qhs_vsense_ctrl_cfg:slv-qhs-vsense-ctrl-cfg {

drivers/clk/qcom/clk-rcg2.c

+48 −7

Original line number	Diff line number	Diff line
		@@ -64,6 +64,16 @@ static struct freq_tbl cxo_f = {
		.n = 0,
		};

		static void update_src_map(struct clk_hw *hw)
		{
		struct clk_rcg2 *rcg = to_clk_rcg2(hw);
		int i, num_parents = clk_hw_get_num_parents(hw);

		for (i = 0; i < num_parents; i++)
		if (!rcg->parent_map[i].cfg)
		cxo_f.src = rcg->parent_map[i].src;
		}

		static int clk_rcg2_is_enabled(struct clk_hw *hw)
		{
		struct clk_rcg2 *rcg = to_clk_rcg2(hw);
		@@ -247,16 +257,21 @@ static unsigned long
		clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
		{
		struct clk_rcg2 *rcg = to_clk_rcg2(hw);
		u32 cfg, hid_div, m = 0, n = 0, mode = 0, mask;
		const struct freq_tbl *f_curr;
		u32 cfg, src, hid_div, m = 0, n = 0, mode = 0, mask;

		if (rcg->enable_safe_config && !clk_hw_is_prepared(hw)) {
		regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);
		src = cfg;
		src &= CFG_SRC_SEL_MASK;
		src >>= CFG_SRC_SEL_SHIFT;

		if (rcg->enable_safe_config && (!clk_hw_is_prepared(hw)
		\|\| !clk_hw_is_enabled(hw)) && !src) {
		if (!rcg->current_freq)
		rcg->current_freq = cxo_f.freq;
		return rcg->current_freq;
		}

		regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);

		if (rcg->mnd_width) {
		mask = BIT(rcg->mnd_width) - 1;
		regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + M_REG, &m);
		@@ -269,9 +284,17 @@ clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
		mode >>= CFG_MODE_SHIFT;
		}

		if (rcg->enable_safe_config && !src) {
		f_curr = qcom_find_freq(rcg->freq_tbl, rcg->current_freq);
		if (!f_curr)
		return -EINVAL;

		hid_div = f_curr->pre_div;
		} else {
		mask = BIT(rcg->hid_width) - 1;
		hid_div = cfg >> CFG_SRC_DIV_SHIFT;
		hid_div &= mask;
		}

		return calc_rate(parent_rate, m, n, mode, hid_div);
		}
		@@ -494,6 +517,12 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate,
		if (!f)
		return -EINVAL;

		/*
		* Set the correct source value for CXO as per
		* as per defined parent map.
		*/
		update_src_map(hw);

		/*
		* Return if the RCG is currently disabled. This configuration update
		* will happen as part of the RCG enable sequence.
		@@ -577,6 +606,12 @@ static int clk_rcg2_enable(struct clk_hw *hw)
		unsigned long rate;
		const struct freq_tbl *f;

		/*
		* Set the correct source value for CXO as per
		* as per defined parent map.
		*/
		update_src_map(hw);

		if (rcg->flags & FORCE_ENABLE_RCG) {
		clk_rcg2_set_force_enable(hw);
		return 0;
		@@ -618,6 +653,12 @@ static void clk_rcg2_disable(struct clk_hw *hw)
		{
		struct clk_rcg2 *rcg = to_clk_rcg2(hw);

		/*
		* Set the correct source value for CXO as per
		* as per defined parent map.
		*/
		update_src_map(hw);

		if (rcg->flags & FORCE_ENABLE_RCG) {
		clk_rcg2_clear_force_enable(hw);
		return;

drivers/soc/qcom/msm_bus/msm_bus_fabric_rpmh.c

+16 −17

Original line number	Diff line number	Diff line
		@@ -1020,9 +1020,6 @@ static int msm_bus_dev_sbm_config(struct device *dev, bool enable)
		return -ENXIO;
		}

		if (!node_dev->node_info->num_disable_ports)
		return 0;

		if ((node_dev->node_bw[DUAL_CTX].sum_ab \|\|
		node_dev->node_bw[DUAL_CTX].max_ib \|\|
		!node_dev->is_connected) && !enable)
		@@ -1051,6 +1048,7 @@ static int msm_bus_dev_sbm_config(struct device *dev, bool enable)
		node_dev->is_connected = true;
		}

		if (node_dev->node_info->num_disable_ports) {
		fab_dev = to_msm_bus_node(node_dev->node_info->bus_device);
		if (!fab_dev) {
		MSM_BUS_ERR("%s: Unable to get bus device info for %d",
		@@ -1067,6 +1065,7 @@ static int msm_bus_dev_sbm_config(struct device *dev, bool enable)
		fab_dev->fabdev->sbm_offset,
		enable);
		}
		}

		if (!enable) {
		for (idx = 0; idx < node_dev->num_regs; idx++) {