Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 651487c2 authored by oulijun's avatar oulijun Committed by Doug Ledford
Browse files

RDMA/hns: Configure fence attribute in hip08 RoCE 



When post wr for mixed rdma operation, we need to use fence
mechanism to keep the correct execute order.

Signed-off-by: default avatarLijun Ou <oulijun@huawei.com>
Signed-off-by: default avatarWei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: default avatarShaobo Xu <xushaobo2@huawei.com>
Signed-off-by: default avatarYixian Liu <liuyixian@huawei.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent e92f2c18

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+3 −1
Original line number Diff line number Diff line
@@ -104,7 +104,6 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 
		qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] =

								      wr->wr_id;





		rc_sq_wqe = wqe;

		memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));

		for (i = 0; i < wr->num_sge; i++)
@@ -112,6 +111,9 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 


		rc_sq_wqe->inv_key_immtdata = send_ieth(wr);



		roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_FENCE_S,

			    (wr->send_flags & IB_SEND_FENCE) ? 1 : 0);



		switch (wr->opcode) {

		case IB_WR_RDMA_READ:

			roce_set_field(rc_sq_wqe->byte_4,