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Commit 65057a7a authored by David Dai's avatar David Dai
Browse files

clk: qcom: dispcc: Enable HW_CTL for internally sourced RCGs 



Enable the HW_CTL bit on RCGs that have internal PLL sources
in order to safely reconfigure and update the RCG in the event
that it's enabled from some other hardware signal.

Change-Id: Ib278ddf609cdfdb3e1ad27583e94219aefb2149f
Signed-off-by: default avatarDavid Dai <daidavid1@codeaurora.org>
parent 3d91e789

drivers/clk/qcom/dispcc-kona.c

+3 −0
Original line number Diff line number Diff line
@@ -356,6 +356,7 @@ static struct clk_rcg2 disp_cc_mdss_ahb_clk_src = { 
	.parent_map = disp_cc_parent_map_3,

	.freq_tbl = ftbl_disp_cc_mdss_ahb_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "disp_cc_mdss_ahb_clk_src",

		.parent_names = disp_cc_parent_names_3,
@@ -716,6 +717,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { 
	.parent_map = disp_cc_parent_map_5,

	.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "disp_cc_mdss_mdp_clk_src",

		.parent_names = disp_cc_parent_names_5,
@@ -791,6 +793,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = { 
	.parent_map = disp_cc_parent_map_5,

	.freq_tbl = ftbl_disp_cc_mdss_rot_clk_src,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "disp_cc_mdss_rot_clk_src",

		.parent_names = disp_cc_parent_names_5,