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Commit 3d91e789 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add support for debugcc for LITO"

parents 26c53c08 c6161e44

arch/arm64/boot/dts/qcom/lito.dtsi

+23 −4
Original line number Original line Diff line number Diff line
@@ -930,7 +930,7 @@ 
		#reset-cells = <1>;

		#reset-cells = <1>;

	};

	};





	videocc: qcom,videocc {

	videocc: qcom,videocc@ab00000 {

		compatible = "qcom,lito-videocc", "syscon";

		compatible = "qcom,lito-videocc", "syscon";

		reg = <0x0ab00000 0x10000>;

		reg = <0x0ab00000 0x10000>;

		reg-names = "cc_base";

		reg-names = "cc_base";
@@ -941,7 +941,7 @@ 
		#reset-cells = <1>;

		#reset-cells = <1>;

	};

	};





	dispcc: qcom,dispcc {

	dispcc: qcom,dispcc@af00000 {

		compatible = "qcom,lito-dispcc", "syscon";

		compatible = "qcom,lito-dispcc", "syscon";

		reg = <0xaf00000 0x20000>;

		reg = <0xaf00000 0x20000>;

		reg-names = "cc_base";

		reg-names = "cc_base";
@@ -952,7 +952,7 @@ 
		#reset-cells = <1>;

		#reset-cells = <1>;

	};

	};





	gpucc: qcom,gpucc {

	gpucc: qcom,gpucc@3d90000 {

		compatible = "qcom,lito-gpucc", "syscon";

		compatible = "qcom,lito-gpucc", "syscon";

		reg = <0x3d90000 0x9000>;

		reg = <0x3d90000 0x9000>;

		reg-names = "cc_base";

		reg-names = "cc_base";
@@ -964,7 +964,7 @@ 
		#reset-cells = <1>;

		#reset-cells = <1>;

	};

	};





	npucc: qcom,npucc {

	npucc: qcom,npucc@9980000 {

		compatible = "qcom,lito-npucc", "syscon";

		compatible = "qcom,lito-npucc", "syscon";

		reg = <0x9980000 0x10000>,

		reg = <0x9980000 0x10000>,

			<0x9800000 0x10000>,

			<0x9800000 0x10000>,
@@ -975,6 +975,25 @@ 
		#reset-cells = <1>;

		#reset-cells = <1>;

	};

	};





	cpucc: syscon@182a0018 {

		compatible = "syscon";

		reg = <0x182a0018 0x4>;

	};



	debugcc: qcom,cc-debug {

		compatible = "qcom,lito-debugcc";

		qcom,gcc = <&gcc>;

		qcom,videocc = <&videocc>;

		qcom,dispcc = <&dispcc>;

		qcom,camcc = <&camcc>;

		qcom,gpucc = <&gpucc>;

		qcom,npucc = <&npucc>;

		qcom,cpucc = <&cpucc>;

		clock-names = "xo_clk_src";

		clocks = <&rpmhcc RPMH_CXO_CLK>;

		#clock-cells = <1>;

	};



	spmi_bus: qcom,spmi@c440000 {

	spmi_bus: qcom,spmi@c440000 {

		compatible = "qcom,spmi-pmic-arb";

		compatible = "qcom,spmi-pmic-arb";

		reg = <0xc440000 0x1100>,

		reg = <0xc440000 0x1100>,

arch/arm64/configs/vendor/lito-perf_defconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -378,6 +378,7 @@ CONFIG_SM_CAMCC_LITO=y 
CONFIG_SM_DISPCC_LITO=y

CONFIG_SM_DISPCC_LITO=y

CONFIG_SM_GPUCC_LITO=y

CONFIG_SM_GPUCC_LITO=y

CONFIG_SM_NPUCC_LITO=y

CONFIG_SM_NPUCC_LITO=y

CONFIG_SM_DEBUGCC_LITO=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

CONFIG_MAILBOX=y

arch/arm64/configs/vendor/lito_defconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -389,6 +389,7 @@ CONFIG_SM_CAMCC_LITO=y 
CONFIG_SM_DISPCC_LITO=y

CONFIG_SM_DISPCC_LITO=y

CONFIG_SM_GPUCC_LITO=y

CONFIG_SM_GPUCC_LITO=y

CONFIG_SM_NPUCC_LITO=y

CONFIG_SM_NPUCC_LITO=y

CONFIG_SM_DEBUGCC_LITO=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_HWSPINLOCK_QCOM=y

CONFIG_MAILBOX=y

CONFIG_MAILBOX=y