Merge branch 'hyp-boot-mode-rmk' of...

- CPU mode

  All forms of interrupts must be disabled (IRQs and FIQs)

  The CPU must be in SVC mode.  (A special exception exists for Angel)

  For CPUs which do not include the ARM virtualization extensions, the

  CPU must be in SVC mode.  (A special exception exists for Angel)

  CPUs which include support for the virtualization extensions can be

  entered in HYP mode in order to enable the kernel to make full use of

  these extensions.  This is the recommended boot method for such CPUs,

  unless the virtualisations are already in use by a pre-installed

  hypervisor.

  If the kernel is not entered in HYP mode for any reason, it must be

  entered in SVC mode.

- Caches, MMUs

  The MMU must be off.

  Instruction cache may be on or off.

  Data cache must be off.

  If the kernel is entered in HYP mode, the above requirements apply to

  the HYP mode configuration in addition to the ordinary PL1 (privileged

  kernel modes) configuration.  In addition, all traps into the

  hypervisor must be disabled, and PL1 access must be granted for all

  peripherals and CPU resources for which this is architecturally

  possible.  Except for entering in HYP mode, the system configuration

  should be such that a kernel which does not include support for the

  virtualization extensions can boot correctly without extra help.

- The boot loader is expected to call the kernel image by jumping

  directly to the first instruction of the kernel image.

ashldi3.S

font.c

lib1funcs.S

hyp-stub.S

piggy.gzip

piggy.lzo

piggy.lzma

OBJS		+= string.o

CFLAGS_string.o	:= -Os

ifeq ($(CONFIG_ARM_VIRT_EXT),y)

OBJS		+= hyp-stub.o

endif

#

# Architecture dependencies

#

endif

ccflags-y := -fpic -fno-builtin -I$(obj)

asflags-y := -Wa,-march=all

asflags-y := -Wa,-march=all -DZIMAGE

# Supply kernel BSS size to the decompressor via a linker symbol.

KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \

$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile $(KCONFIG_CONFIG)

	@sed "$(SEDFLAGS)" < $< > $@

$(obj)/hyp-stub.S: $(srctree)/arch/$(SRCARCH)/kernel/hyp-stub.S

	$(call cmd,shipped)

 * published by the Free Software Foundation.

 */

#include <linux/linkage.h>

#include <asm/assembler.h>

/*

 * Debugging stuff

		.word	start			@ absolute load/run zImage address

		.word	_edata			@ zImage end address

 THUMB(		.thumb			)

1:		mov	r7, r1			@ save architecture ID

1:

		mrs	r9, cpsr

#ifdef CONFIG_ARM_VIRT_EXT

		bl	__hyp_stub_install	@ get into SVC mode, reversibly

#endif

		mov	r7, r1			@ save architecture ID

		mov	r8, r2			@ save atags pointer

#ifndef __ARM_ARCH_2__

 ARM(		swi	0x123456	)	@ angel_SWI_ARM

 THUMB(		svc	0xab		)	@ angel_SWI_THUMB

not_angel:

		mrs	r2, cpsr		@ turn off interrupts to

		orr	r2, r2, #0xc0		@ prevent angel from running

		msr	cpsr_c, r2

		safe_svcmode_maskall r0

		msr	spsr_cxsf, r9		@ Save the CPU boot mode in

						@ SPSR

#else

		teqp	pc, #0x0c000003		@ turn off interrupts

#endif

		adr	r5, restart

		bic	r5, r5, #31

/* Relocate the hyp vector base if necessary */

#ifdef CONFIG_ARM_VIRT_EXT

		mrs	r0, spsr

		and	r0, r0, #MODE_MASK

		cmp	r0, #HYP_MODE

		bne	1f

		bl	__hyp_get_vectors

		sub	r0, r0, r5

		add	r0, r0, r10

		bl	__hyp_set_vectors

1:

#endif

		sub	r9, r6, r5		@ size to copy

		add	r9, r9, #31		@ rounded up to a multiple

		bic	r9, r9, #31		@ ... of 32 bytes

		bl	decompress_kernel

		bl	cache_clean_flush

		bl	cache_off

		mov	r0, #0			@ must be zero

		mov	r1, r7			@ restore architecture number

		mov	r2, r8			@ restore atags pointer

 ARM(		mov	pc, r4	)		@ call kernel

 THUMB(		bx	r4	)		@ entry point is always ARM

#ifdef CONFIG_ARM_VIRT_EXT

		mrs	r0, spsr		@ Get saved CPU boot mode

		and	r0, r0, #MODE_MASK

		cmp	r0, #HYP_MODE		@ if not booted in HYP mode...

		bne	__enter_kernel		@ boot kernel directly

		adr	r12, .L__hyp_reentry_vectors_offset

		ldr	r0, [r12]

		add	r0, r0, r12

		bl	__hyp_set_vectors

		__HVC(0)			@ otherwise bounce to hyp mode

		b	.			@ should never be reached

		.align	2

.L__hyp_reentry_vectors_offset:	.long	__hyp_reentry_vectors - .

#else

		b	__enter_kernel

#endif

		.align	2

		.type	LC0, #object

#endif

		.ltorg

#ifdef CONFIG_ARM_VIRT_EXT

.align 5

__hyp_reentry_vectors:

		W(b)	.			@ reset

		W(b)	.			@ undef

		W(b)	.			@ svc

		W(b)	.			@ pabort

		W(b)	.			@ dabort

		W(b)	__enter_kernel		@ hyp

		W(b)	.			@ irq

		W(b)	.			@ fiq

#endif /* CONFIG_ARM_VIRT_EXT */

__enter_kernel:

		mov	r0, #0			@ must be 0

 ARM(		mov	pc, r4	)		@ call kernel

 THUMB(		bx	r4	)		@ entry point is always ARM

reloc_code_end:

		.align

#include <asm/ptrace.h>

#include <asm/domain.h>

#include <asm/opcodes-virt.h>

#define IOMEM(x)	(x)

	.endm

#endif

/*

 * Helper macro to enter SVC mode cleanly and mask interrupts. reg is

 * a scratch register for the macro to overwrite.

 *

 * This macro is intended for forcing the CPU into SVC mode at boot time.

 * you cannot return to the original mode.

 *

 * Beware, it also clobers LR.

 */

.macro safe_svcmode_maskall reg:req

	mrs	\reg , cpsr

	mov	lr , \reg

	and	lr , lr , #MODE_MASK

	cmp	lr , #HYP_MODE

	orr	\reg , \reg , #PSR_A_BIT | PSR_I_BIT | PSR_F_BIT

	bic	\reg , \reg , #MODE_MASK

	orr	\reg , \reg , #SVC_MODE

THUMB(	orr	\reg , \reg , #PSR_T_BIT	)

	msr	spsr_cxsf, \reg

	adr	lr, BSYM(2f)

	bne	1f

	__MSR_ELR_HYP(14)

	__ERET

1:	movs	pc, lr

2:

.endm

/*

 * STRT/LDRT access macros with ARM and Thumb-2 variants

 */