Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8ee777fd authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Russell King
Browse files

ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon 



Some architectures like xscale and feroceon have cache API variants that
map cache flushing functions as aliases to the base architecture.
This patch adds the required aliases to complete the implementation of
cache flushing LoUIS API.

Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent e3ef0dc6

arch/arm/mm/proc-feroceon.S

+1 −0
Original line number Diff line number Diff line
@@ -434,6 +434,7 @@ ENDPROC(feroceon_dma_unmap_area) 
	range_alias flush_icache_all

	range_alias flush_user_cache_all

	range_alias flush_kern_cache_all

	range_alias flush_kern_cache_louis

	range_alias flush_user_cache_range

	range_alias coherent_kern_range

	range_alias coherent_user_range

arch/arm/mm/proc-xscale.S

+1 −0
Original line number Diff line number Diff line
@@ -442,6 +442,7 @@ ENDPROC(xscale_dma_unmap_area) 
	a0_alias flush_icache_all

	a0_alias flush_user_cache_all

	a0_alias flush_kern_cache_all

	a0_alias flush_kern_cache_louis

	a0_alias flush_user_cache_range

	a0_alias coherent_kern_range

	a0_alias coherent_user_range