Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5f7e280f authored by Ioana Ciornei's avatar Ioana Ciornei Committed by Greg Kroah-Hartman
Browse files

staging: iio: adc: remove the use of CamelCase



Remove the use of CamelCase to follow the kernel naming conventions

Signed-off-by: default avatarIoana Ciornei <ciorneiioana@gmail.com>
Reviewed-by: default avatarDaniel Baluta <daniel.baluta@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 253ed684
Loading
Loading
Loading
Loading
+5 −5
Original line number Diff line number Diff line
@@ -124,7 +124,7 @@
#define AD7192_GPOCON_P1DAT	BIT(1) /* P1 state */
#define AD7192_GPOCON_P0DAT	BIT(0) /* P0 state */

#define AD7192_INT_FREQ_MHz	4915200
#define AD7192_INT_FREQ_MHZ	4915200

/* NOTE:
 * The AD7190/2/5 features a dual use data out ready DOUT/RDY output.
@@ -228,14 +228,14 @@ static int ad7192_setup(struct ad7192_state *st,
	switch (pdata->clock_source_sel) {
	case AD7192_CLK_EXT_MCLK1_2:
	case AD7192_CLK_EXT_MCLK2:
		st->mclk = AD7192_INT_FREQ_MHz;
		st->mclk = AD7192_INT_FREQ_MHZ;
		break;
	case AD7192_CLK_INT:
	case AD7192_CLK_INT_CO:
		if (pdata->ext_clk_Hz)
			st->mclk = pdata->ext_clk_Hz;
		if (pdata->ext_clk_hz)
			st->mclk = pdata->ext_clk_hz;
		else
			st->mclk = AD7192_INT_FREQ_MHz;
			st->mclk = AD7192_INT_FREQ_MHZ;
			break;
	default:
		ret = -EINVAL;
+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@
struct ad7192_platform_data {
	u16		vref_mv;
	u8		clock_source_sel;
	u32		ext_clk_Hz;
	u32		ext_clk_hz;
	bool		refin2_en;
	bool		rej60_en;
	bool		sinc3_en;
+2 −2
Original line number Diff line number Diff line
@@ -89,7 +89,7 @@

#define AD7280A_ALL_CELLS				(0xAD << 16)

#define AD7280A_MAX_SPI_CLK_Hz		700000 /* < 1MHz */
#define AD7280A_MAX_SPI_CLK_HZ		700000 /* < 1MHz */
#define AD7280A_MAX_CHAIN		8
#define AD7280A_CELLS_PER_DEV		6
#define AD7280A_BITS			12
@@ -853,7 +853,7 @@ static int ad7280_probe(struct spi_device *spi)

	ad7280_crc8_build_table(st->crc_tab);

	st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_Hz;
	st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
	st->spi->mode = SPI_MODE_1;
	spi_setup(st->spi);