Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5f4e0be3 authored by Emilio López's avatar Emilio López
Browse files

clk: sunxi: make factors_clk_setup return the clock it registers



We will be needing this to register a factor clock as parent with leaf
divisors on a single call.

Signed-off-by: default avatarEmilio López <emilio@elopez.com.ar>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
parent d838ff33
Loading
Loading
Loading
Loading
+8 −7
Original line number Diff line number Diff line
@@ -317,8 +317,8 @@ static const struct factors_data sun4i_apb1_data __initconst = {
	.getter = sun4i_get_apb1_factors,
};

static void __init sunxi_factors_clk_setup(struct device_node *node,
					   struct factors_data *data)
static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
						const struct factors_data *data)
{
	struct clk *clk;
	struct clk_factors *factors;
@@ -340,14 +340,14 @@ static void __init sunxi_factors_clk_setup(struct device_node *node,

	factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
	if (!factors)
		return;
		return NULL;

	/* Add a gate if this factor clock can be gated */
	if (data->enable) {
		gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
		if (!gate) {
			kfree(factors);
			return;
			return NULL;
		}

		/* set up gate properties */
@@ -363,7 +363,7 @@ static void __init sunxi_factors_clk_setup(struct device_node *node,
		if (!mux) {
			kfree(factors);
			kfree(gate);
			return;
			return NULL;
		}

		/* set up gate properties */
@@ -384,13 +384,14 @@ static void __init sunxi_factors_clk_setup(struct device_node *node,
			parents, i,
			mux_hw, &clk_mux_ops,
			&factors->hw, &clk_factors_ops,
			gate_hw, &clk_gate_ops,
			i ? 0 : CLK_IS_ROOT);
			gate_hw, &clk_gate_ops, 0);

	if (!IS_ERR(clk)) {
		of_clk_add_provider(node, of_clk_src_simple_get, clk);
		clk_register_clkdev(clk, clk_name, NULL);
	}

	return clk;
}