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Commit 5c3657bc authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Update UFS core clock with right frequencies"

parents 1a2480a0 d1adbdba

qcom/lito.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -2084,7 +2084,7 @@ 
			<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,

			<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;

		freq-table-hz =

			<37500000 300000000>,

			<50000000 200000000>,

			<0 0>,

			<0 0>,

			<37500000 150000000>,