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Commit d1adbdba authored by Veerabhadrarao Badiganti's avatar Veerabhadrarao Badiganti
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ARM: dts: msm: Update UFS core clock with right frequencies 

Upddate UFS core clock with correct frequencies for LowSVS and NOM
voltage corners.

Change-Id: Ife3ba74c26f6406422b1672fb65f6a97bcdc97f3
parent b83b181e

qcom/lito.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -2084,7 +2084,7 @@ 
			<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,

			<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;

		freq-table-hz =

			<37500000 300000000>,

			<50000000 200000000>,

			<0 0>,

			<0 0>,

			<37500000 150000000>,