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Commit 5b85057a authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/dmaobj: namespace + nvidia gpu names (no binary change) 



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 878da15a

drivers/gpu/drm/nouveau/include/nvkm/engine/dmaobj.h

+14 −19
Original line number Diff line number Diff line 
#ifndef __NOUVEAU_DMAOBJ_H__

#define __NOUVEAU_DMAOBJ_H__



#include <core/object.h>

#ifndef __NVKM_DMAOBJ_H__

#define __NVKM_DMAOBJ_H__

#include <core/engine.h>

struct nvkm_gpuobj;



struct nouveau_gpuobj;



struct nouveau_dmaobj {

	struct nouveau_object base;

struct nvkm_dmaobj {

	struct nvkm_object base;

	u32 target;

	u32 access;

	u64 start;

	u64 limit;

};



struct nouveau_dmaeng {

	struct nouveau_engine base;

struct nvkm_dmaeng {

	struct nvkm_engine base;



	/* creates a "physical" dma object from a struct nouveau_dmaobj */

	int (*bind)(struct nouveau_dmaobj *dmaobj,

		    struct nouveau_object *parent,

		    struct nouveau_gpuobj **);

	/* creates a "physical" dma object from a struct nvkm_dmaobj */

	int (*bind)(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent,

		    struct nvkm_gpuobj **);

};



extern struct nouveau_oclass *nv04_dmaeng_oclass;

extern struct nouveau_oclass *nv50_dmaeng_oclass;

extern struct nouveau_oclass *nvc0_dmaeng_oclass;

extern struct nouveau_oclass *nvd0_dmaeng_oclass;



extern struct nvkm_oclass *nv04_dmaeng_oclass;

extern struct nvkm_oclass *nv50_dmaeng_oclass;

extern struct nvkm_oclass *gf100_dmaeng_oclass;

extern struct nvkm_oclass *gf110_dmaeng_oclass;

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

+2 −2
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@ gm100_identify(struct nouveau_device *device) 
#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
@@ -126,7 +126,7 @@ gm100_identify(struct nouveau_device *device) 
#if 0

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c

+9 −9
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc0_gr_oclass;
@@ -113,7 +113,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -146,7 +146,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -178,7 +178,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -211,7 +211,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc4_gr_oclass;
@@ -243,7 +243,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc1_gr_oclass;
@@ -275,7 +275,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc8_gr_oclass;
@@ -308,7 +308,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvd9_gr_oclass;
@@ -338,7 +338,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvd7_gr_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c

+8 −8
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
@@ -114,7 +114,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
@@ -148,7 +148,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;
@@ -174,7 +174,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &gk20a_bar_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;
@@ -204,7 +204,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_gr_oclass;
@@ -238,7 +238,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;
@@ -272,7 +272,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;
@@ -305,7 +305,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/Kbuild

+2 −2
Original line number Diff line number Diff line 
nvkm-y += nvkm/engine/dmaobj/base.o

nvkm-y += nvkm/engine/dmaobj/nv04.o

nvkm-y += nvkm/engine/dmaobj/nv50.o

nvkm-y += nvkm/engine/dmaobj/nvc0.o

nvkm-y += nvkm/engine/dmaobj/nvd0.o
 
nvkm-y += nvkm/engine/dmaobj/gf100.o

nvkm-y += nvkm/engine/dmaobj/gf110.o