Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 878da15a authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/disp: namespace + nvidia gpu names (no binary change) 



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent ccdfdf21

drivers/gpu/drm/nouveau/include/nvkm/core/os.h

+3 −0
Original line number Diff line number Diff line
@@ -245,5 +245,8 @@ 
#define nouveau_fuse nvkm_fuse

#define nouveau_mc nvkm_mc

#define nouveau_mmu nvkm_mmu

#define nouveau_dmaeng nvkm_dmaeng

#define nouveau_dmaobj nvkm_dmaobj

#define nouveau_disp nvkm_disp



#endif

drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h

+18 −22
Original line number Diff line number Diff line 
#ifndef __NOUVEAU_DISP_H__

#define __NOUVEAU_DISP_H__



#include <core/object.h>

#ifndef __NVKM_DISP_H__

#define __NVKM_DISP_H__

#include <core/engine.h>

#include <core/device.h>

#include <core/event.h>



struct nouveau_disp {

	struct nouveau_engine base;

struct nvkm_disp {

	struct nvkm_engine base;



	struct list_head outp;
@@ -15,22 +12,21 @@ struct nouveau_disp { 
	struct nvkm_event vblank;

};



static inline struct nouveau_disp *

nouveau_disp(void *obj)

static inline struct nvkm_disp *

nvkm_disp(void *obj)

{

	return (void *)nouveau_engine(obj, NVDEV_ENGINE_DISP);

	return (void *)nvkm_engine(obj, NVDEV_ENGINE_DISP);

}



extern struct nouveau_oclass *nv04_disp_oclass;

extern struct nouveau_oclass *nv50_disp_oclass;

extern struct nouveau_oclass *nv84_disp_oclass;

extern struct nouveau_oclass *nva0_disp_oclass;

extern struct nouveau_oclass *nv94_disp_oclass;

extern struct nouveau_oclass *nva3_disp_oclass;

extern struct nouveau_oclass *nvd0_disp_oclass;

extern struct nouveau_oclass *nve0_disp_oclass;

extern struct nouveau_oclass *nvf0_disp_oclass;

extern struct nouveau_oclass *gm107_disp_oclass;

extern struct nouveau_oclass *gm204_disp_oclass;



extern struct nvkm_oclass *nv04_disp_oclass;

extern struct nvkm_oclass *nv50_disp_oclass;

extern struct nvkm_oclass *g84_disp_oclass;

extern struct nvkm_oclass *gt200_disp_oclass;

extern struct nvkm_oclass *g94_disp_oclass;

extern struct nvkm_oclass *gt215_disp_oclass;

extern struct nvkm_oclass *gf110_disp_oclass;

extern struct nvkm_oclass *gk104_disp_oclass;

extern struct nvkm_oclass *gk110_disp_oclass;

extern struct nvkm_oclass *gm107_disp_oclass;

extern struct nvkm_oclass *gm204_disp_oclass;

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c

+13 −13
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;

		device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv84_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g84_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0x86:
@@ -142,7 +142,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;

		device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv84_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g84_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0x92:
@@ -171,7 +171,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;

		device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv84_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g84_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0x94:
@@ -200,7 +200,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;

		device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g94_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0x96:
@@ -229,7 +229,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;

		device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g94_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0x98:
@@ -258,7 +258,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_SEC    ] = &nv98_sec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g94_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0xa0:
@@ -287,7 +287,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_VP     ] = &nv84_vp_oclass;

		device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &g84_bsp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt200_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0xaa:
@@ -316,7 +316,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_SEC    ] = &nv98_sec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g94_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0xac:
@@ -345,7 +345,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_SEC    ] = &nv98_sec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nv94_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  g94_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nv84_pm_oclass;

		break;

	case 0xa3:
@@ -376,7 +376,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;

		break;

	case 0xa5:
@@ -406,7 +406,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;

		break;

	case 0xa8:
@@ -436,7 +436,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;

		break;

	case 0xaf:
@@ -466,7 +466,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nv98_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nv98_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gt215_ce_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] =  nva3_pm_oclass;

		break;

	default:

drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c

+9 −9
Original line number Diff line number Diff line
@@ -89,7 +89,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xc4:
@@ -122,7 +122,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xc3:
@@ -154,7 +154,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xce:
@@ -187,7 +187,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xcf:
@@ -219,7 +219,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xc1:
@@ -251,7 +251,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xc8:
@@ -284,7 +284,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gf100_ce1_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nva3_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gt215_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xd9:
@@ -316,7 +316,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvd0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gf110_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	case 0xd7:
@@ -346,7 +346,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_MSVLD  ] = &nvc0_msvld_oclass;

		device->oclass[NVDEV_ENGINE_MSPPP  ] = &nvc0_msppp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gf100_ce0_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvd0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gf110_disp_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &nvc0_pm_oclass;

		break;

	default:

drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c

+7 −7
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
@@ -118,7 +118,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
@@ -152,7 +152,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nve0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
@@ -208,7 +208,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
@@ -242,7 +242,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
@@ -276,7 +276,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
@@ -309,7 +309,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nv108_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;

		device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;