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Commit 5a40b7c2 authored by Andi Kleen's avatar Andi Kleen Committed by Linus Torvalds
Browse files

[PATCH] x86-64: Remove code for outdated APICs 



No x86-64 chipset has these APICs.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 61c11341

arch/x86_64/kernel/apic.c

+2 −13
Original line number Diff line number Diff line
@@ -109,12 +109,9 @@ void clear_local_APIC(void) 
	if (maxlvt >= 4)

		apic_write_around(APIC_LVTPC, APIC_LVT_MASKED);

	v = GET_APIC_VERSION(apic_read(APIC_LVR));

	if (APIC_INTEGRATED(v)) {	/* !82489DX */

		if (maxlvt > 3)		/* Due to Pentium errata 3AP and 11AP. */

	apic_write(APIC_ESR, 0);

	apic_read(APIC_ESR);

}

}



void __init connect_bsp_APIC(void)

{
@@ -316,8 +313,6 @@ void __init init_bsp_APIC(void) 
	 */

	apic_write_around(APIC_LVT0, APIC_DM_EXTINT);

	value = APIC_DM_NMI;

	if (!APIC_INTEGRATED(ver))		/* 82489DX */

		value |= APIC_LVT_LEVEL_TRIGGER;

	apic_write_around(APIC_LVT1, value);

}
@@ -422,15 +417,11 @@ void __cpuinit setup_local_APIC (void) 
		value = APIC_DM_NMI;

	else

		value = APIC_DM_NMI | APIC_LVT_MASKED;

	if (!APIC_INTEGRATED(ver))		/* 82489DX */

		value |= APIC_LVT_LEVEL_TRIGGER;

	apic_write_around(APIC_LVT1, value);



	{

		unsigned oldvalue;

		maxlvt = get_maxlvt();

		if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */

			apic_write(APIC_ESR, 0);

		oldvalue = apic_read(APIC_ESR);

		value = ERROR_APIC_VECTOR;      // enables sending errors

		apic_write_around(APIC_LVTERR, value);
@@ -674,8 +665,6 @@ static void __setup_APIC_LVTT(unsigned int clocks) 


	ver = GET_APIC_VERSION(apic_read(APIC_LVR));

	lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;

	if (!APIC_INTEGRATED(ver))

		lvtt_value |= SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV);

	apic_write_around(APIC_LVTT, lvtt_value);



	/*

arch/x86_64/kernel/io_apic.c

+7 −13
Original line number Diff line number Diff line
@@ -1022,13 +1022,11 @@ void __apicdebuginit print_local_APIC(void * dummy) 
	v = apic_read(APIC_TASKPRI);

	printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK);



	if (APIC_INTEGRATED(ver)) {			/* !82489DX */

	v = apic_read(APIC_ARBPRI);

	printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v,

		v & APIC_ARBPRI_MASK);

	v = apic_read(APIC_PROCPRI);

	printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v);

	}



	v = apic_read(APIC_EOI);

	printk(KERN_DEBUG "... APIC EOI: %08x\n", v);
@@ -1048,12 +1046,8 @@ void __apicdebuginit print_local_APIC(void * dummy) 
	printk(KERN_DEBUG "... APIC IRR field:\n");

	print_APIC_bitfield(APIC_IRR);



	if (APIC_INTEGRATED(ver)) {		/* !82489DX */

		if (maxlvt > 3)		/* Due to the Pentium erratum 3AP. */

			apic_write(APIC_ESR, 0);

	v = apic_read(APIC_ESR);

	printk(KERN_DEBUG "... APIC ESR: %08x\n", v);

	}



	v = apic_read(APIC_ICR);

	printk(KERN_DEBUG "... APIC ICR: %08x\n", v);

arch/x86_64/kernel/smpboot.c

+1 −10
Original line number Diff line number Diff line
@@ -610,16 +610,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta 


	atomic_set(&init_deasserted, 1);



	/*

	 * Should we send STARTUP IPIs ?

	 *

	 * Determine this based on the APIC version.

	 * If we don't have an integrated APIC, don't send the STARTUP IPIs.

	 */

	if (APIC_INTEGRATED(apic_version[phys_apicid]))

	num_starts = 2;

	else

		num_starts = 0;



	/*

	 * Run STARTUP IPI loop.