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Commit 5785271e authored by Christophe JAILLET's avatar Christophe JAILLET Committed by Stephen Boyd
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clk: cdce925: Fix limit check

It is likely that instead of '1>64', 'q>64' was expected.

Moreover, according to datasheet,
   http://www.ti.com/lit/ds/symlink/cdce925.pdf


   SCAS847I - JULY 2007 - REVISED OCTOBER 2016
PLL settings limits are: 16 <= q <= 63
So change the upper limit check from 64 to 63.

Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 100edfe3
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