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Commit 4cf1b96a authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer Committed by Greg Kroah-Hartman
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MIPS: SNI: Fix MIPS_L1_CACHE_SHIFT 



[ Upstream commit 564c836fd945a94b5dd46597d6b7adb464092650 ]

Commit 930beb5a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") forgot
to select the correct MIPS_L1_CACHE_SHIFT for SNI RM. This breaks non
coherent DMA because of a wrong allocation alignment.

Fixes: 930beb5a ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>")
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent c5dbe216
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