rtl818x: Make sure the TX descriptor "valid" flag is written by last

The TX descriptors are consumed by the HW using DMA.
Even if in the driver code the memory write that sets the "valid"
flag appears after all other writes, the CPU may reorder writes,
causing the HW to consider as valid a not-fully-written yet
descriptor.

This may cause HW incorrect behaviour.

This can happen because (AFAIK) the HW may attempt DMA
asynchronously without waiting to be kicked by the following
register write.

This patch adds a write memory barrier to enforce writes ordering.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>