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Commit 4ba055ef authored by Yuanfang Zhang's avatar Yuanfang Zhang
Browse files

ARM: dts: msm: Add jtagv8 devices for scuba 

Jtagv8 driver can be used to save and restore debug and
ETM registers across power collapse.

Change-Id: I46ed3ee32310a19e86675916a811904c18a3bd9b
parent c76de96a

qcom/scuba.dtsi

+44 −0
Original line number Diff line number Diff line
@@ -161,6 +161,50 @@ 
		interrupts = <1 9 4>;

	};



	jtag_mm0: jtagmm@9040000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x9040000 0x1000>;

		reg-names = "etm-base";



		clocks = <&rpmcc RPM_SMD_QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU0>;

	};



	jtag_mm1: jtagmm@9140000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x9140000 0x1000>;

		reg-names = "etm-base";



		clocks = <&rpmcc RPM_SMD_QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU1>;

	};



	jtag_mm2: jtagmm@9240000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x9240000 0x1000>;

		reg-names = "etm-base";



		clocks = <&rpmcc RPM_SMD_QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU2>;

	};



	jtag_mm3: jtagmm@9340000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x9340000 0x1000>;

		reg-names = "etm-base";



		clocks = <&rpmcc RPM_SMD_QDSS_CLK>;

		clock-names = "core_clk";



		qcom,coresight-jtagmm-cpu = <&CPU3>;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 1 0xf08>,