Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c76de96a authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add GPU mempool configuration for Bengal 32bit"

parents e4652ef5 6681cbb8
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -248,7 +248,7 @@ KGSL Memory Pools:
				Each mempool defines a pool order, reserved pages,
				allocation allowed.
Properties:
- compatible:			Must be qcom,gpu-mempools.
- compatible:			Should be qcom,gpu-mempools or qcom,gpu-mempools-lowmem.
- qcom,mempool-max-pages:	Max pages for all mempools, If not defined there is no limit.
- qcom,gpu-mempool:		Defines a set of mempools.

+34 −0
Original line number Diff line number Diff line
@@ -221,6 +221,40 @@
			};
		};

		/* GPU Mempool configuration for low memory SKUs */
		qcom,gpu-mempools-lowmem {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "qcom,gpu-mempools-lowmem";

			/* 4K Page Pool configuration */
			qcom,gpu-mempool@0 {
				reg = <0>;
				qcom,mempool-page-size = <4096>;
				qcom,mempool-allocate;
			};
			/* 8K Page Pool configuration */
			qcom,gpu-mempool@1 {
				reg = <1>;
				qcom,mempool-page-size = <8192>;
				qcom,mempool-allocate;
			};
			/* 64K Page Pool configuration */
			qcom,gpu-mempool@2 {
				reg = <2>;
				qcom,mempool-page-size = <65536>;
				qcom,mempool-allocate;
				qcom,mempool-max-pages = <256>;
			};
			/* 1M Page Pool configuration */
			qcom,gpu-mempool@3 {
				reg = <3>;
				qcom,mempool-page-size = <1048576>;
				qcom,mempool-allocate;
				qcom,mempool-max-pages = <32>;
			};
		};

		/*
		 * Speed-bin zero is default speed bin.
		 * For rest of the speed bins, speed-bin value