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Commit 49852411 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: remove OCMEM support



Now that a4xx is gone we no longer have any targets that require OCMEM
support anymore so say good bye to an old friend.

Change-Id: Ic0dedbad279895c1648defb3e45721c1937de0d9
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 2a1d9299
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+0 −51
Original line number Diff line number Diff line
@@ -1132,49 +1132,6 @@ static int adreno_of_get_power(struct adreno_device *adreno_dev,
	return 0;
}

#ifdef CONFIG_QCOM_OCMEM
static int
adreno_ocmem_malloc(struct adreno_device *adreno_dev)
{
	if (!ADRENO_FEATURE(adreno_dev, ADRENO_USES_OCMEM))
		return 0;

	if (adreno_dev->ocmem_hdl == NULL) {
		adreno_dev->ocmem_hdl =
			ocmem_allocate(OCMEM_GRAPHICS, adreno_dev->gmem_size);
		if (IS_ERR_OR_NULL(adreno_dev->ocmem_hdl)) {
			adreno_dev->ocmem_hdl = NULL;
			return -ENOMEM;
		}

		adreno_dev->gmem_size = adreno_dev->ocmem_hdl->len;
		adreno_dev->gmem_base = adreno_dev->ocmem_hdl->addr;
	}

	return 0;
}

static void
adreno_ocmem_free(struct adreno_device *adreno_dev)
{
	if (adreno_dev->ocmem_hdl != NULL) {
		ocmem_free(OCMEM_GRAPHICS, adreno_dev->ocmem_hdl);
		adreno_dev->ocmem_hdl = NULL;
	}
}
#else
static int
adreno_ocmem_malloc(struct adreno_device *adreno_dev)
{
	return 0;
}

static void
adreno_ocmem_free(struct adreno_device *adreno_dev)
{
}
#endif

static void adreno_cx_dbgc_probe(struct kgsl_device *device)
{
	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
@@ -1863,12 +1820,6 @@ static int _adreno_start(struct adreno_device *adreno_dev)
	if (status)
		goto error_boot_oob_clear;

	status = adreno_ocmem_malloc(adreno_dev);
	if (status) {
		dev_err(device->dev, "OCMEM malloc failed\n");
		goto error_mmu_off;
	}

	/* Send OOB request to turn on the GX */
	status = gmu_core_dev_oob_set(device, oob_gpu);
	if (status)
@@ -2143,8 +2094,6 @@ static int adreno_stop(struct kgsl_device *device)

	adreno_irqctrl(adreno_dev, 0);

	adreno_ocmem_free(adreno_dev);

	adreno_llc_deactivate_slice(adreno_dev->gpu_llc_slice);
	adreno_llc_deactivate_slice(adreno_dev->gpuhtw_llc_slice);

+0 −8
Original line number Diff line number Diff line
@@ -17,10 +17,6 @@
#include <linux/delay.h>
#include "kgsl_gmu_core.h"

#ifdef CONFIG_QCOM_OCMEM
#include <soc/qcom/ocmem.h>
#endif

#define DEVICE_3D_NAME "kgsl-3d"
#define DEVICE_3D0_NAME "kgsl-3d0"

@@ -79,8 +75,6 @@
#define ADRENO_FW(a, f)		(&(a->fw[f]))

/* Adreno core features */
/* The core uses OCMEM for GMEM/binning memory */
#define ADRENO_USES_OCMEM     BIT(0)
/* The core supports SP/TP hw controlled power collapse */
#define ADRENO_SPTP_PC BIT(3)
/* The core supports Peak Power Detection(PPD)*/
@@ -441,7 +435,6 @@ enum gpu_coresight_sources {
 * @ft_policy: Defines the fault tolerance policy
 * @long_ib_detect: Long IB detection availability
 * @ft_pf_policy: Defines the fault policy for page faults
 * @ocmem_hdl: Handle to the ocmem allocated buffer
 * @profile: Container for adreno profiler information
 * @dispatcher: Container for adreno GPU dispatcher
 * @pwron_fixup: Command buffer to run a post-power collapse shader workaround
@@ -522,7 +515,6 @@ struct adreno_device {
	unsigned long ft_policy;
	unsigned int long_ib_detect;
	unsigned long ft_pf_policy;
	struct ocmem_buf *ocmem_hdl;
	struct adreno_profile profile;
	struct adreno_dispatcher dispatcher;
	struct kgsl_memdesc pwron_fixup;
+0 −4
Original line number Diff line number Diff line
@@ -1393,10 +1393,6 @@ static void a3xx_start(struct adreno_device *adreno_dev)
		kgsl_regwrite(device, A3XX_RBBM_GPR0_CTL,
			A310_RBBM_GPR0_CTL_DEFAULT);

	if (ADRENO_FEATURE(adreno_dev, ADRENO_USES_OCMEM))
		kgsl_regwrite(device, A3XX_RB_GMEM_BASE_ADDR,
			(unsigned int)(adreno_dev->gmem_base >> 14));

	/* Turn on protection */
	a3xx_protect_init(adreno_dev);

+1 −40
Original line number Diff line number Diff line
@@ -293,14 +293,6 @@ void kgsl_pwrctrl_buslevel_update(struct kgsl_device *device,
	/* buslevel is the IB vote, update the AB */
	_ab_buslevel_update(pwr, &ab);

	/**
	 * vote for ocmem if target supports ocmem scaling,
	 * shut down based on "on" parameter
	 */
	if (pwr->ocmem_pcl)
		msm_bus_scale_client_update_request(pwr->ocmem_pcl,
			on ? pwr->active_pwrlevel : pwr->num_pwrlevels - 1);

	kgsl_bus_scale_request(device, buslevel);

	kgsl_pwrctrl_vbif_update(ab);
@@ -1957,14 +1949,6 @@ static inline void _close_pcl(struct kgsl_pwrctrl *pwr)
	pwr->pcl = 0;
}

static inline void _close_ocmem_pcl(struct kgsl_pwrctrl *pwr)
{
	if (pwr->ocmem_pcl)
		msm_bus_scale_unregister_client(pwr->ocmem_pcl);

	pwr->ocmem_pcl = 0;
}

static inline void _close_regulators(struct kgsl_pwrctrl *pwr)
{
	int i;
@@ -2038,8 +2022,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
	int i, k, m, n = 0, result, freq;
	struct platform_device *pdev = device->pdev;
	struct kgsl_pwrctrl *pwr = &device->pwrctrl;
	struct device_node *ocmem_bus_node;
	struct msm_bus_scale_pdata *ocmem_scale_table = NULL;
	struct msm_bus_scale_pdata *bus_scale_table;
	struct device_node *gpubw_dev_node = NULL;
	struct platform_device *p2dev;
@@ -2117,23 +2099,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)

	pm_runtime_enable(&pdev->dev);

	ocmem_bus_node = of_find_node_by_name(
				device->pdev->dev.of_node,
				"qcom,ocmem-bus-client");
	/* If platform has split ocmem bus client - use it */
	if (ocmem_bus_node) {
		ocmem_scale_table = msm_bus_pdata_from_node
				(device->pdev, ocmem_bus_node);
		if (ocmem_scale_table)
			pwr->ocmem_pcl = msm_bus_scale_register_client
					(ocmem_scale_table);

		if (!pwr->ocmem_pcl) {
			result = -EINVAL;
			goto error_disable_pm;
		}
	}

	/* Bus width in bytes, set it to zero if not found */
	if (of_property_read_u32(pdev->dev.of_node, "qcom,bus-width",
		&pwr->bus_width))
@@ -2163,7 +2128,7 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
		pwr->pcl = msm_bus_scale_register_client(bus_scale_table);
		if (pwr->pcl == 0) {
			result = -EINVAL;
			goto error_cleanup_ocmem_pcl;
			goto error_disable_pm;
		}
	}

@@ -2231,8 +2196,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)

error_cleanup_pcl:
	_close_pcl(pwr);
error_cleanup_ocmem_pcl:
	_close_ocmem_pcl(pwr);
error_disable_pm:
	pm_runtime_disable(&pdev->dev);
error_cleanup_regulators:
@@ -2257,8 +2220,6 @@ void kgsl_pwrctrl_close(struct kgsl_device *device)

	_close_pcl(pwr);

	_close_ocmem_pcl(pwr);

	pm_runtime_disable(&device->pdev->dev);

	_close_regulators(pwr);
+2 −4
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0 */
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2010-2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2010-2019, The Linux Foundation. All rights reserved.
 */
#ifndef __KGSL_PWRCTRL_H
#define __KGSL_PWRCTRL_H
@@ -131,7 +131,6 @@ struct kgsl_regulator {
 * @clock_times - Each GPU frequency's accumulated active time in us
 * @regulators - array of pointers to kgsl_regulator structs
 * @pcl - bus scale identifier
 * @ocmem - ocmem bus scale identifier
 * @irq_name - resource name for the IRQ
 * @clk_stats - structure of clock statistics
 * @l2pc_cpus_mask - mask to avoid L2PC on masked CPUs
@@ -189,7 +188,6 @@ struct kgsl_pwrctrl {
	u64 clock_times[KGSL_MAX_PWRLEVELS];
	struct kgsl_regulator regulators[KGSL_MAX_REGULATORS];
	uint32_t pcl;
	uint32_t ocmem_pcl;
	const char *irq_name;
	struct kgsl_clk_stats clk_stats;
	unsigned int l2pc_cpus_mask;