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Commit 2a1d9299 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Remove warm/cold start 



4xx was the only target that used "warm" start for bootstrap. Since that
is now gone we can remove the rest of the infrastructure and clean things
up a bit.

Change-Id: Ic0dedbad701559ae9a448c1a674cd0c1aea0fbab
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 7cc33411

drivers/gpu/msm/adreno.c

+2 −5
Original line number Diff line number Diff line
@@ -2044,7 +2044,7 @@ static int _adreno_start(struct adreno_device *adreno_dev) 
	/* Clear FSR here in case it is set from a previous pagefault */

	kgsl_mmu_clear_fsr(&device->mmu);



	status = adreno_ringbuffer_start(adreno_dev, ADRENO_START_COLD);

	status = adreno_ringbuffer_start(adreno_dev);

	if (status)

		goto error_oob_clear;
@@ -2791,10 +2791,7 @@ int adreno_soft_reset(struct kgsl_device *device) 
	 * otherwise do a full ringbuffer restart

	 */



	if (ADRENO_FEATURE(adreno_dev, ADRENO_WARM_START))

		ret = adreno_ringbuffer_start(adreno_dev, ADRENO_START_WARM);

	else

		ret = adreno_ringbuffer_start(adreno_dev, ADRENO_START_COLD);

	ret = adreno_ringbuffer_start(adreno_dev);

	if (ret == 0) {

		device->reset_counter++;

		set_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv);

drivers/gpu/msm/adreno.h

+1 −21
Original line number Diff line number Diff line
@@ -81,8 +81,6 @@ 
/* Adreno core features */

/* The core uses OCMEM for GMEM/binning memory */

#define ADRENO_USES_OCMEM     BIT(0)

/* The core supports an accelerated warm start */

#define ADRENO_WARM_START     BIT(1)

/* The core supports SP/TP hw controlled power collapse */

#define ADRENO_SPTP_PC BIT(3)

/* The core supports Peak Power Detection(PPD)*/
@@ -222,9 +220,6 @@ enum adreno_gpurev { 
	ADRENO_REV_A680 = 680,

};



#define ADRENO_START_WARM 0

#define ADRENO_START_COLD 1



#define ADRENO_SOFT_FAULT BIT(0)

#define ADRENO_HARD_FAULT BIT(1)

#define ADRENO_TIMEOUT_FAULT BIT(2)
@@ -364,13 +359,6 @@ struct adreno_device_private { 
 * @zap_name: Filename for the Zap Shader ucode

 * @gpudev: Pointer to the GPU family specific functions for this core

 * @gmem_size: Amount of binning memory (GMEM/OCMEM) to reserve for the core

 * @pm4_jt_idx: Index of the jump table in the PM4 microcode

 * @pm4_jt_addr: Address offset to load the jump table for the PM4 microcode

 * @pfp_jt_idx: Index of the jump table in the PFP microcode

 * @pfp_jt_addr: Address offset to load the jump table for the PFP microcode

 * @pm4_bstrp_size: Size of the bootstrap loader for PM4 microcode

 * @pfp_bstrp_size: Size of the bootstrap loader for PFP microcde

 * @pfp_bstrp_ver: Version of the PFP microcode that supports bootstraping

 * @shader_offset: Offset of shader from gpu reg base

 * @shader_size: Shader size

 * @num_protected_regs: number of protected registers
@@ -395,13 +383,6 @@ struct adreno_gpu_core { 
	const char *zap_name;

	struct adreno_gpudev *gpudev;

	size_t gmem_size;

	unsigned int pm4_jt_idx;

	unsigned int pm4_jt_addr;

	unsigned int pfp_jt_idx;

	unsigned int pfp_jt_addr;

	unsigned int pm4_bstrp_size;

	unsigned int pfp_bstrp_size;

	unsigned int pfp_bstrp_ver;

	unsigned long shader_offset;

	unsigned int shader_size;

	unsigned int num_protected_regs;
@@ -967,8 +948,7 @@ struct adreno_gpudev { 
	void (*platform_setup)(struct adreno_device *adreno_dev);

	void (*init)(struct adreno_device *adreno_dev);

	void (*remove)(struct adreno_device *adreno_dev);

	int (*rb_start)(struct adreno_device *adreno_dev,

				unsigned int start_type);

	int (*rb_start)(struct adreno_device *adreno_dev);

	int (*microcode_read)(struct adreno_device *adreno_dev);

	void (*perfcounter_init)(struct adreno_device *adreno_dev);

	void (*perfcounter_close)(struct adreno_device *adreno_dev);

drivers/gpu/msm/adreno_a3xx.c

+11 −26
Original line number Diff line number Diff line
@@ -683,8 +683,9 @@ static int a3xx_send_me_init(struct adreno_device *adreno_dev, 
	return ret;

}



static int a3xx_rb_start(struct adreno_device *adreno_dev,

			 unsigned int start_type)

static int a3xx_microcode_load(struct adreno_device *adreno_dev);



static int a3xx_rb_start(struct adreno_device *adreno_dev)

{

	struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);

	int ret;
@@ -703,7 +704,7 @@ static int a3xx_rb_start(struct adreno_device *adreno_dev, 
	adreno_writereg(adreno_dev, ADRENO_REG_CP_RB_BASE,

			rb->buffer_desc.gpuaddr);



	ret = a3xx_microcode_load(adreno_dev, start_type);

	ret = a3xx_microcode_load(adreno_dev);

	if (ret == 0) {

		/* clear ME_HALT to start micro engine */

		adreno_writereg(adreno_dev, ADRENO_REG_CP_ME_CNTL, 0);
@@ -1593,7 +1594,7 @@ static int _load_firmware(struct kgsl_device *device, const char *fwfile, 
	return (*buf != NULL) ? 0 : -ENOMEM;

}



int a3xx_microcode_read(struct adreno_device *adreno_dev)

static int a3xx_microcode_read(struct adreno_device *adreno_dev)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct adreno_firmware *pm4_fw = ADRENO_FW(adreno_dev, ADRENO_FW_PM4);
@@ -1693,32 +1694,16 @@ static inline void load_pfp_ucode(struct adreno_device *adreno_dev, 
				adreno_dev->fw[ADRENO_FW_PFP].fwvirt[i]);

}



int a3xx_microcode_load(struct adreno_device *adreno_dev,

				unsigned int start_type)

static int a3xx_microcode_load(struct adreno_device *adreno_dev)

{

	size_t pm4_size = adreno_dev->fw[ADRENO_FW_PM4].size;

	size_t pfp_size = adreno_dev->fw[ADRENO_FW_PFP].size;



	if (start_type == ADRENO_START_COLD) {

	/* load the CP ucode using AHB writes */

	load_pm4_ucode(adreno_dev, 1, pm4_size, 0);



	/* load the prefetch parser ucode using AHB writes */

	load_pfp_ucode(adreno_dev, 1, pfp_size, 0);

	} else if (start_type == ADRENO_START_WARM) {

			/* load the CP jump tables using AHB writes */

			load_pm4_ucode(adreno_dev,

				adreno_dev->gpucore->pm4_jt_idx,

				pm4_size, adreno_dev->gpucore->pm4_jt_addr);



			/*

			 * load the prefetch parser jump tables using AHB writes

			 */

			load_pfp_ucode(adreno_dev,

				adreno_dev->gpucore->pfp_jt_idx,

				pfp_size, adreno_dev->gpucore->pfp_jt_addr);

	} else

		return -EINVAL;



	return 0;

}

drivers/gpu/msm/adreno_a3xx.h

+2 −12
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.

 * Copyright (c) 2013-2016, 2019, The Linux Foundation. All rights reserved.

 */

#ifndef __A3XX_H

#define __A3XX_H
@@ -35,16 +35,6 @@ 


unsigned int a3xx_irq_pending(struct adreno_device *adreno_dev);



int a3xx_microcode_read(struct adreno_device *adreno_dev);

int a3xx_microcode_load(struct adreno_device *adreno_dev,

				unsigned int start_type);

int a3xx_perfcounter_enable(struct adreno_device *adreno_dev,

	unsigned int group, unsigned int counter, unsigned int countable);

uint64_t a3xx_perfcounter_read(struct adreno_device *adreno_dev,

	unsigned int group, unsigned int counter);



void a3xx_a4xx_err_callback(struct adreno_device *adreno_dev, int bit);



void a3xx_snapshot(struct adreno_device *adreno_dev,

		struct kgsl_snapshot *snapshot);

#endif /*__A3XX_H */

drivers/gpu/msm/adreno_a5xx.c

+1 −3
Original line number Diff line number Diff line
@@ -2363,10 +2363,8 @@ static int a5xx_send_me_init(struct adreno_device *adreno_dev, 
/*

 * a5xx_rb_start() - Start the ringbuffer

 * @adreno_dev: Pointer to adreno device

 * @start_type: Warm or cold start

 */

static int a5xx_rb_start(struct adreno_device *adreno_dev,

			 unsigned int start_type)

static int a5xx_rb_start(struct adreno_device *adreno_dev)

{

	struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);

	struct kgsl_device *device = &adreno_dev->dev;