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Commit 46e446db authored by Haojian Zhuang's avatar Haojian Zhuang Committed by Haojian Zhuang
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Document: devicetree: add OF documents for arch-mmp



Add OF support in Document/devicetree directory.

Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 10d77ec2
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Marvell Platforms Device Tree Bindings
----------------------------------------------------

PXA168 Aspenite Board
Required root node properties:
	- compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
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* Marvell PXA GPIO controller

Required properties:
- compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"
- reg : Address and length of the register set for the device
- interrupts : Should be the port interrupt shared by all gpio pins, if
- interrupt-name : Should be the name of irq resource.
  one number.
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be one.  It is the pin number.

Example:

	gpio: gpio@d4019000 {
		compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
		reg = <0xd4019000 0x1000>;
		interrupts = <49>, <17>, <18>;
		interrupt-name = "gpio_mux", "gpio0", "gpio1";
		gpio-controller;
		#gpio-cells = <1>;
		interrupt-controller;
		#interrupt-cells = <1>;
      };
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* I2C

Required properties :

 - reg : Offset and length of the register set for the device
 - compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a
   compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
   For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
   as shown in the example below.

Recommended properties :

 - interrupts : <a b> where a is the interrupt number and b is a
   field that represents an encoding of the sense and level
   information for the interrupt.  This should be encoded based on
   the information in section 2) depending on the type of interrupt
   controller you have.
 - interrupt-parent : the phandle for the interrupt controller that
   services interrupts for this device.
 - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
   status register of i2c controller instead.
 - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.

Examples:
	twsi1: i2c@d4011000 {
		compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
		reg = <0xd4011000 0x1000>;
		interrupts = <7>;
		mrvl,i2c-fast-mode;
	};
	
	twsi2: i2c@d4025000 {
		compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
		reg = <0xd4025000 0x1000>;
		interrupts = <58>;
	};
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* Marvell Real Time Clock controller

Required properties:
- compatible: should be "mrvl,sa1100-rtc"
- reg: physical base address of the controller and length of memory mapped
  region.
- interrupts: Should be two. The first interrupt number is the rtc alarm
  interrupt and the second interrupt number is the rtc hz interrupt.
- interrupt-names: Assign name of irq resource.

Example:
	rtc: rtc@d4010000 {
		compatible = "mrvl,mmp-rtc";
		reg = <0xd4010000 0x1000>;
		interrupts = <5>, <6>;
		interrupt-name = "rtc 1Hz", "rtc alarm";
	};
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PXA UART controller

Required properties:
- compatible : should be "mrvl,mmp-uart" or "mrvl,pxa-uart".