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Commit 40aa52c4 authored by Arvind Yadav's avatar Arvind Yadav Committed by Bjorn Helgaas
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PCI: dwc: dra7xx: Use RW1C for IRQSTATUS_MSI and IRQSTATUS_MAIN 



Previously, we tried to clear interrupt requests by clearing bits in the
PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI and PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN
registers.  But per the TRM, these fields are RW1C, so we must *set* bits
to clear the interrupt bits.

Fixes: 47ff3de9 ("PCI: dra7xx: Add TI DRA7xx PCIe driver")
Signed-off-by: default avatarArvind Yadav <arvind.yadav.cs@gmail.com>
[bhelgaas: changelog]
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 27fce382

drivers/pci/dwc/pci-dra7xx.c

+2 −2
Original line number Diff line number Diff line
@@ -174,7 +174,7 @@ static int dra7xx_pcie_establish_link(struct dw_pcie *pci) 
static void dra7xx_pcie_enable_msi_interrupts(struct dra7xx_pcie *dra7xx)

{

	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI,

			   ~LEG_EP_INTERRUPTS & ~MSI);

			   LEG_EP_INTERRUPTS | MSI);



	dra7xx_pcie_writel(dra7xx,

			   PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MSI,
@@ -184,7 +184,7 @@ static void dra7xx_pcie_enable_msi_interrupts(struct dra7xx_pcie *dra7xx) 
static void dra7xx_pcie_enable_wrapper_interrupts(struct dra7xx_pcie *dra7xx)

{

	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN,

			   ~INTERRUPTS);

			   INTERRUPTS);

	dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN,

			   INTERRUPTS);

}