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Commit 3ef9dd2b authored by Boris Brezillon's avatar Boris Brezillon Committed by Mike Turquette
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clk: at91: rework PLL rate calculation



The AT91 PLL rate configuration is done by configuring a multiplier/divider
pair.
The previous calculation was over-complicated (and apparently buggy).
Simplify the implementation and add some comments to explain what is done
here.

Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: default avatarGaël PORTAY <gael.portay@gmail.com>
Tested-by: default avatarGaël PORTAY <gael.portay@gmail.com>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 078a3eb5
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