disp: msm: sde: switch rsc state before CTL_PREPARE in dual display

In dual display usecase when both displays comes out of
idle following scenario will cause wr_ptr timeout.

 1. Both displays goes to idle and RSCC enters Mode-2.
 2. Primary display exit idle upon DRM commit N RSC
    enters Solver State.
 3. Secondary display exits idle upon DRM commit M and
    waits on input fence after CTL_1_PREPARE is set.
    RSC is still in CMD state.
 4. Primary Commit N frame transfer got successful and
    commit N+1 is queued in primary display when RSC
    in solver state which leads to timeout in primary.

This is because RSCC will not generate a wakeup in sync with
primary timelines leading to timeout. This is because RSCC
still sees idle low thinking frame transfer is taking long
time. This change will switch the rsc state to AMC mode
before CTL_PREPARE is set which resolves such issue.

Change-Id: Ic32e48b4febbbcc54d94876194d38fe6ef3d0981
Signed-off-by: Mahadevan <mahap@codeaurora.org>
Signed-off-by: Raghavendra Ambadas <quic_c_rambad@quicinc.com>