Loading arch/ia64/kernel/sys_ia64.c +1 −1 Original line number Diff line number Diff line Loading @@ -35,7 +35,7 @@ arch_get_unmapped_area (struct file *filp, unsigned long addr, unsigned long len return -ENOMEM; #ifdef CONFIG_HUGETLB_PAGE if (REGION_NUMBER(addr) == REGION_HPAGE) if (REGION_NUMBER(addr) == RGN_HPAGE) addr = 0; #endif if (!addr) Loading arch/ia64/mm/hugetlbpage.c +4 −4 Original line number Diff line number Diff line Loading @@ -76,7 +76,7 @@ int is_aligned_hugepage_range(unsigned long addr, unsigned long len) return -EINVAL; if (addr & ~HPAGE_MASK) return -EINVAL; if (REGION_NUMBER(addr) != REGION_HPAGE) if (REGION_NUMBER(addr) != RGN_HPAGE) return -EINVAL; return 0; Loading @@ -87,7 +87,7 @@ struct page *follow_huge_addr(struct mm_struct *mm, unsigned long addr, int writ struct page *page; pte_t *ptep; if (REGION_NUMBER(addr) != REGION_HPAGE) if (REGION_NUMBER(addr) != RGN_HPAGE) return ERR_PTR(-EINVAL); ptep = huge_pte_offset(mm, addr); Loading Loading @@ -142,8 +142,8 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, u return -ENOMEM; if (len & ~HPAGE_MASK) return -EINVAL; /* This code assumes that REGION_HPAGE != 0. */ if ((REGION_NUMBER(addr) != REGION_HPAGE) || (addr & (HPAGE_SIZE - 1))) /* This code assumes that RGN_HPAGE != 0. */ if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1))) addr = HPAGE_REGION_BASE; else addr = ALIGN(addr, HPAGE_SIZE); Loading include/asm-ia64/io.h +1 −1 Original line number Diff line number Diff line Loading @@ -23,7 +23,7 @@ #define __SLOW_DOWN_IO do { } while (0) #define SLOW_DOWN_IO do { } while (0) #define __IA64_UNCACHED_OFFSET 0xc000000000000000UL /* region 6 */ #define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED) /* * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but Loading include/asm-ia64/mmu_context.h +6 −1 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) # include <asm/page.h> # ifndef __ASSEMBLY__ #include <linux/compiler.h> Loading Loading @@ -122,7 +123,7 @@ reload_context (nv_mm_context_t context) unsigned long rid_incr = 0; unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; old_rr4 = ia64_get_rr(0x8000000000000000UL); old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE)); rid = context << 3; /* make space for encoding the region number */ rid_incr = 1 << 8; Loading @@ -134,6 +135,10 @@ reload_context (nv_mm_context_t context) rr4 = rr0 + 4*rid_incr; #ifdef CONFIG_HUGETLB_PAGE rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); # if RGN_HPAGE != 4 # error "reload_context assumes RGN_HPAGE is 4" # endif #endif ia64_set_rr(0x0000000000000000UL, rr0); Loading include/asm-ia64/page.h +18 −9 Original line number Diff line number Diff line Loading @@ -12,6 +12,19 @@ #include <asm/intrinsics.h> #include <asm/types.h> /* * The top three bits of an IA64 address are its Region Number. * Different regions are assigned to different purposes. */ #define RGN_SHIFT (61) #define RGN_BASE(r) (__IA64_UL_CONST(r)<<RGN_SHIFT) #define RGN_BITS (RGN_BASE(-1)) #define RGN_KERNEL 7 /* Identity mapped region */ #define RGN_UNCACHED 6 /* Identity mapped I/O region */ #define RGN_GATE 5 /* Gate page, Kernel text, etc */ #define RGN_HPAGE 4 /* For Huge TLB pages */ /* * PAGE_SHIFT determines the actual kernel page size. */ Loading @@ -36,10 +49,9 @@ #define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */ #ifdef CONFIG_HUGETLB_PAGE # define REGION_HPAGE (4UL) /* note: this is hardcoded in reload_context()!*/ # define REGION_SHIFT 61 # define HPAGE_REGION_BASE (REGION_HPAGE << REGION_SHIFT) # define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE) # define HPAGE_SHIFT hpage_shift # define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */ # define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT) Loading Loading @@ -130,16 +142,13 @@ typedef union ia64_va { #define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) #define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) #define REGION_SIZE REGION_NUMBER(1) #define REGION_KERNEL 7 #ifdef CONFIG_HUGETLB_PAGE # define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) # define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) # define is_hugepage_only_range(mm, addr, len) \ (REGION_NUMBER(addr) == REGION_HPAGE && \ REGION_NUMBER((addr)+(len)-1) == REGION_HPAGE) (REGION_NUMBER(addr) == RGN_HPAGE && \ REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE) extern unsigned int hpage_shift; #endif Loading Loading @@ -197,7 +206,7 @@ get_order (unsigned long size) # define __pgprot(x) (x) #endif /* !STRICT_MM_TYPECHECKS */ #define PAGE_OFFSET __IA64_UL_CONST(0xe000000000000000) #define PAGE_OFFSET RGN_BASE(RGN_KERNEL) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \ Loading Loading
arch/ia64/kernel/sys_ia64.c +1 −1 Original line number Diff line number Diff line Loading @@ -35,7 +35,7 @@ arch_get_unmapped_area (struct file *filp, unsigned long addr, unsigned long len return -ENOMEM; #ifdef CONFIG_HUGETLB_PAGE if (REGION_NUMBER(addr) == REGION_HPAGE) if (REGION_NUMBER(addr) == RGN_HPAGE) addr = 0; #endif if (!addr) Loading
arch/ia64/mm/hugetlbpage.c +4 −4 Original line number Diff line number Diff line Loading @@ -76,7 +76,7 @@ int is_aligned_hugepage_range(unsigned long addr, unsigned long len) return -EINVAL; if (addr & ~HPAGE_MASK) return -EINVAL; if (REGION_NUMBER(addr) != REGION_HPAGE) if (REGION_NUMBER(addr) != RGN_HPAGE) return -EINVAL; return 0; Loading @@ -87,7 +87,7 @@ struct page *follow_huge_addr(struct mm_struct *mm, unsigned long addr, int writ struct page *page; pte_t *ptep; if (REGION_NUMBER(addr) != REGION_HPAGE) if (REGION_NUMBER(addr) != RGN_HPAGE) return ERR_PTR(-EINVAL); ptep = huge_pte_offset(mm, addr); Loading Loading @@ -142,8 +142,8 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, u return -ENOMEM; if (len & ~HPAGE_MASK) return -EINVAL; /* This code assumes that REGION_HPAGE != 0. */ if ((REGION_NUMBER(addr) != REGION_HPAGE) || (addr & (HPAGE_SIZE - 1))) /* This code assumes that RGN_HPAGE != 0. */ if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1))) addr = HPAGE_REGION_BASE; else addr = ALIGN(addr, HPAGE_SIZE); Loading
include/asm-ia64/io.h +1 −1 Original line number Diff line number Diff line Loading @@ -23,7 +23,7 @@ #define __SLOW_DOWN_IO do { } while (0) #define SLOW_DOWN_IO do { } while (0) #define __IA64_UNCACHED_OFFSET 0xc000000000000000UL /* region 6 */ #define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED) /* * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but Loading
include/asm-ia64/mmu_context.h +6 −1 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) # include <asm/page.h> # ifndef __ASSEMBLY__ #include <linux/compiler.h> Loading Loading @@ -122,7 +123,7 @@ reload_context (nv_mm_context_t context) unsigned long rid_incr = 0; unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; old_rr4 = ia64_get_rr(0x8000000000000000UL); old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE)); rid = context << 3; /* make space for encoding the region number */ rid_incr = 1 << 8; Loading @@ -134,6 +135,10 @@ reload_context (nv_mm_context_t context) rr4 = rr0 + 4*rid_incr; #ifdef CONFIG_HUGETLB_PAGE rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); # if RGN_HPAGE != 4 # error "reload_context assumes RGN_HPAGE is 4" # endif #endif ia64_set_rr(0x0000000000000000UL, rr0); Loading
include/asm-ia64/page.h +18 −9 Original line number Diff line number Diff line Loading @@ -12,6 +12,19 @@ #include <asm/intrinsics.h> #include <asm/types.h> /* * The top three bits of an IA64 address are its Region Number. * Different regions are assigned to different purposes. */ #define RGN_SHIFT (61) #define RGN_BASE(r) (__IA64_UL_CONST(r)<<RGN_SHIFT) #define RGN_BITS (RGN_BASE(-1)) #define RGN_KERNEL 7 /* Identity mapped region */ #define RGN_UNCACHED 6 /* Identity mapped I/O region */ #define RGN_GATE 5 /* Gate page, Kernel text, etc */ #define RGN_HPAGE 4 /* For Huge TLB pages */ /* * PAGE_SHIFT determines the actual kernel page size. */ Loading @@ -36,10 +49,9 @@ #define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */ #ifdef CONFIG_HUGETLB_PAGE # define REGION_HPAGE (4UL) /* note: this is hardcoded in reload_context()!*/ # define REGION_SHIFT 61 # define HPAGE_REGION_BASE (REGION_HPAGE << REGION_SHIFT) # define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE) # define HPAGE_SHIFT hpage_shift # define HPAGE_SHIFT_DEFAULT 28 /* check ia64 SDM for architecture supported size */ # define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT) Loading Loading @@ -130,16 +142,13 @@ typedef union ia64_va { #define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) #define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) #define REGION_SIZE REGION_NUMBER(1) #define REGION_KERNEL 7 #ifdef CONFIG_HUGETLB_PAGE # define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) # define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) # define is_hugepage_only_range(mm, addr, len) \ (REGION_NUMBER(addr) == REGION_HPAGE && \ REGION_NUMBER((addr)+(len)-1) == REGION_HPAGE) (REGION_NUMBER(addr) == RGN_HPAGE && \ REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE) extern unsigned int hpage_shift; #endif Loading Loading @@ -197,7 +206,7 @@ get_order (unsigned long size) # define __pgprot(x) (x) #endif /* !STRICT_MM_TYPECHECKS */ #define PAGE_OFFSET __IA64_UL_CONST(0xe000000000000000) #define PAGE_OFFSET RGN_BASE(RGN_KERNEL) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \ Loading