Pull ngam-maule-steiner into release branch (bcdd3a91) · Commits · e / devices / android_kernel_fairphone_FP4

arch/ia64/sn/include/tio.h

+5 −1

Original line number	Diff line number	Diff line
		@@ -3,7 +3,7 @@
		* License. See the file "COPYING" in the main directory of this archive
		* for more details.
		*
		* Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
		* Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
		*/

		#ifndef _ASM_IA64_SN_TIO_H
		@@ -26,6 +26,10 @@
		#define TIO_ITTE_VALID_MASK 0x1
		#define TIO_ITTE_VALID_SHIFT 16

		#define TIO_ITTE_WIDGET(itte) \
		(((itte) >> TIO_ITTE_WIDGET_SHIFT) & TIO_ITTE_WIDGET_MASK)
		#define TIO_ITTE_VALID(itte) \
		(((itte) >> TIO_ITTE_VALID_SHIFT) & TIO_ITTE_VALID_MASK)

		#define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \
		REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \

arch/ia64/sn/include/xtalk/hubdev.h

+8 −3

Original line number	Diff line number	Diff line
		@@ -3,7 +3,7 @@
		* License. See the file "COPYING" in the main directory of this archive
		* for more details.
		*
		* Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
		* Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
		*/
		#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H
		#define _ASM_IA64_SN_XTALK_HUBDEV_H
		@@ -16,6 +16,9 @@
		#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
		#define IIO_ITTE_WIDGET_SHIFT 8

		#define IIO_ITTE_WIDGET(itte) \
		(((itte) >> IIO_ITTE_WIDGET_SHIFT) & IIO_ITTE_WIDGET_MASK)

		/*
		* Use the top big window as a surrogate for the first small window
		*/
		@@ -34,7 +37,8 @@ struct sn_flush_device_list {
		unsigned long sfdl_force_int_addr;
		unsigned long sfdl_flush_value;
		volatile unsigned long *sfdl_flush_addr;
		uint64_t sfdl_persistent_busnum;
		uint32_t sfdl_persistent_busnum;
		uint32_t sfdl_persistent_segment;
		struct pcibus_info *sfdl_pcibus_info;
		spinlock_t sfdl_flush_lock;
		};
		@@ -58,7 +62,8 @@ struct hubdev_info {

		void *hdi_nodepda;
		void *hdi_node_vertex;
		void *hdi_xtalk_vertex;
		uint32_t max_segment_number;
		uint32_t max_pcibus_number;
		};

		extern void hubdev_init_node(nodepda_t *, cnodeid_t);

arch/ia64/sn/kernel/bte.c

+52 −31

Original line number	Diff line number	Diff line
		@@ -29,16 +29,30 @@

		/* two interfaces on two btes */
		#define MAX_INTERFACES_TO_TRY 4
		#define MAX_NODES_TO_TRY 2

		static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface)
		{
		nodepda_t *tmp_nodepda;

		if (nasid_to_cnodeid(nasid) == -1)
		return (struct bteinfo_s *)NULL;;

		tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid));
		return &tmp_nodepda->bte_if[interface];

		}

		static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode)
		{
		if (is_shub2()) {
		BTE_CTRL_STORE(bte, (IBLS_BUSY \| ((len) \| (mode) << 24)));
		} else {
		BTE_LNSTAT_STORE(bte, len);
		BTE_CTRL_STORE(bte, mode);
		}
		}

		/************************************************************************
		* Block Transfer Engine copy related functions.
		*
		@@ -67,13 +81,15 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
		{
		u64 transfer_size;
		u64 transfer_stat;
		u64 notif_phys_addr;
		struct bteinfo_s *bte;
		bte_result_t bte_status;
		unsigned long irq_flags;
		unsigned long itc_end = 0;
		struct bteinfo_s *btes_to_try[MAX_INTERFACES_TO_TRY];
		int bte_if_index;
		int bte_pri, bte_sec;
		int nasid_to_try[MAX_NODES_TO_TRY];
		int my_nasid = get_nasid();
		int bte_if_index, nasid_index;
		int bte_first, btes_per_node = BTES_PER_NODE;

		BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
		src, dest, len, mode, notification));
		@@ -86,36 +102,26 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
		(src & L1_CACHE_MASK) \|\| (dest & L1_CACHE_MASK));
		BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT)));

		/* CPU 0 (per node) tries bte0 first, CPU 1 try bte1 first */
		if (cpuid_to_subnode(smp_processor_id()) == 0) {
		bte_pri = 0;
		bte_sec = 1;
		} else {
		bte_pri = 1;
		bte_sec = 0;
		}
		/*
		* Start with interface corresponding to cpu number
		*/
		bte_first = raw_smp_processor_id() % btes_per_node;

		if (mode & BTE_USE_DEST) {
		/* try remote then local */
		btes_to_try[0] = bte_if_on_node(NASID_GET(dest), bte_pri);
		btes_to_try[1] = bte_if_on_node(NASID_GET(dest), bte_sec);
		nasid_to_try[0] = NASID_GET(dest);
		if (mode & BTE_USE_ANY) {
		btes_to_try[2] = bte_if_on_node(get_nasid(), bte_pri);
		btes_to_try[3] = bte_if_on_node(get_nasid(), bte_sec);
		nasid_to_try[1] = my_nasid;
		} else {
		btes_to_try[2] = NULL;
		btes_to_try[3] = NULL;
		nasid_to_try[1] = (int)NULL;
		}
		} else {
		/* try local then remote */
		btes_to_try[0] = bte_if_on_node(get_nasid(), bte_pri);
		btes_to_try[1] = bte_if_on_node(get_nasid(), bte_sec);
		nasid_to_try[0] = my_nasid;
		if (mode & BTE_USE_ANY) {
		btes_to_try[2] = bte_if_on_node(NASID_GET(dest), bte_pri);
		btes_to_try[3] = bte_if_on_node(NASID_GET(dest), bte_sec);
		nasid_to_try[1] = NASID_GET(dest);
		} else {
		btes_to_try[2] = NULL;
		btes_to_try[3] = NULL;
		nasid_to_try[1] = (int)NULL;
		}
		}

		@@ -123,11 +129,12 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
		do {
		local_irq_save(irq_flags);

		bte_if_index = 0;
		bte_if_index = bte_first;
		nasid_index = 0;

		/* Attempt to lock one of the BTE interfaces. */
		while (bte_if_index < MAX_INTERFACES_TO_TRY) {
		bte = btes_to_try[bte_if_index++];
		while (nasid_index < MAX_NODES_TO_TRY) {
		bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index);

		if (bte == NULL) {
		continue;
		@@ -143,6 +150,15 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
		break;
		}
		}

		bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */
		if (bte_if_index == bte_first) {
		/*
		* We've tried all interfaces on this node
		*/
		nasid_index++;
		}

		bte = NULL;
		}

		@@ -169,7 +185,13 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)

		/* Initialize the notification to a known value. */
		*bte->most_rcnt_na = BTE_WORD_BUSY;
		notif_phys_addr = TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na));

		if (is_shub2()) {
		src = SH2_TIO_PHYS_TO_DMA(src);
		dest = SH2_TIO_PHYS_TO_DMA(dest);
		notif_phys_addr = SH2_TIO_PHYS_TO_DMA(notif_phys_addr);
		}
		/* Set the source and destination registers */
		BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src))));
		BTE_SRC_STORE(bte, TO_PHYS(src));
		@@ -177,14 +199,12 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
		BTE_DEST_STORE(bte, TO_PHYS(dest));

		/* Set the notification register */
		BTE_PRINTKV(("IBNA = 0x%lx)\n",
		TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na))));
		BTE_NOTIF_STORE(bte,
		TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na)));
		BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr));
		BTE_NOTIF_STORE(bte, notif_phys_addr);

		/* Initiate the transfer */
		BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
		BTE_START_TRANSFER(bte, transfer_size, BTE_VALID_MODE(mode));
		bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode));

		itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);

		@@ -195,6 +215,7 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
		}

		while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) {
		cpu_relax();
		if (ia64_get_itc() > itc_end) {
		BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
		NASID_GET(bte->bte_base_addr), bte->bte_num,

arch/ia64/sn/kernel/huberror.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -76,7 +76,7 @@ void hubiio_crb_free(struct hubdev_info *hubdev_info, int crbnum)
		*/
		REMOTE_HUB_S(hubdev_info->hdi_nasid, IIO_ICDR, (IIO_ICDR_PND \| crbnum));
		while (REMOTE_HUB_L(hubdev_info->hdi_nasid, IIO_ICDR) & IIO_ICDR_PND)
		udelay(1);
		cpu_relax();

		}

arch/ia64/sn/kernel/io_init.c

+29 −6

Original line number	Diff line number	Diff line
		@@ -18,6 +18,7 @@
		#include <asm/sn/simulator.h>
		#include <asm/sn/sn_sal.h>
		#include <asm/sn/tioca_provider.h>
		#include <asm/sn/tioce_provider.h>
		#include "xtalk/hubdev.h"
		#include "xtalk/xwidgetdev.h"

		@@ -44,6 +45,9 @@ int sn_ioif_inited = 0; /* SN I/O infrastructure initialized? */

		struct sn_pcibus_provider sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; / indexed by asic type */

		static int max_segment_number = 0; /* Default highest segment number */
		static int max_pcibus_number = 255; /* Default highest pci bus number */

		/*
		* Hooks and struct for unsupported pci providers
		*/
		@@ -157,13 +161,28 @@ static void sn_fixup_ionodes(void)
		uint64_t nasid;
		int i, widget;

		/*
		* Get SGI Specific HUB chipset information.
		* Inform Prom that this kernel can support domain bus numbering.
		*/
		for (i = 0; i < numionodes; i++) {
		hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
		nasid = cnodeid_to_nasid(i);
		hubdev->max_segment_number = 0xffffffff;
		hubdev->max_pcibus_number = 0xff;
		status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev));
		if (status)
		continue;

		/* Save the largest Domain and pcibus numbers found. */
		if (hubdev->max_segment_number) {
		/*
		* Dealing with a Prom that supports segments.
		*/
		max_segment_number = hubdev->max_segment_number;
		max_pcibus_number = hubdev->max_pcibus_number;
		}

		/* Attach the error interrupt handlers */
		if (nasid & 1)
		ice_error_init(hubdev);
		@@ -230,7 +249,7 @@ void sn_pci_unfixup_slot(struct pci_dev *dev)
		void sn_pci_fixup_slot(struct pci_dev *dev)
		{
		int idx;
		int segment = 0;
		int segment = pci_domain_nr(dev->bus);
		int status = 0;
		struct pcibus_bussoft *bs;
		struct pci_bus *host_pci_bus;
		@@ -283,9 +302,9 @@ void sn_pci_fixup_slot(struct pci_dev *dev)
		* PCI host_pci_dev struct and set up host bus linkages
		*/

		bus_no = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32;
		bus_no = (SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32) & 0xff;
		devfn = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle & 0xffffffff;
		host_pci_bus = pci_find_bus(pci_domain_nr(dev->bus), bus_no);
		host_pci_bus = pci_find_bus(segment, bus_no);
		host_pci_dev = pci_get_slot(host_pci_bus, devfn);

		SN_PCIDEV_INFO(dev)->host_pci_dev = host_pci_dev;
		@@ -333,6 +352,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
		prom_bussoft_ptr = __va(prom_bussoft_ptr);

		controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL);
		controller->segment = segment;
		if (!controller)
		BUG();

		@@ -390,7 +410,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
		if (controller->node >= num_online_nodes()) {
		struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);

		printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%lu"
		printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
		"L_IO=%lx L_MEM=%lx BASE=%lx\n",
		b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
		b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
		@@ -445,6 +465,7 @@ void sn_bus_free_sysdata(void)
		static int __init sn_pci_init(void)
		{
		int i = 0;
		int j = 0;
		struct pci_dev *pci_dev = NULL;
		extern void sn_init_cpei_timer(void);
		#ifdef CONFIG_PROC_FS
		@@ -464,6 +485,7 @@ static int __init sn_pci_init(void)

		pcibr_init_provider();
		tioca_init_provider();
		tioce_init_provider();

		/*
		* This is needed to avoid bounce limit checks in the blk layer
		@@ -479,8 +501,9 @@ static int __init sn_pci_init(void)
		#endif

		/* busses are not known yet ... */
		for (i = 0; i < PCI_BUSES_TO_SCAN; i++)
		sn_pci_controller_fixup(0, i, NULL);
		for (i = 0; i <= max_segment_number; i++)
		for (j = 0; j <= max_pcibus_number; j++)
		sn_pci_controller_fixup(i, j, NULL);

		/*
		* Generic Linux PCI Layer has created the pci_bus and pci_dev