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Commit 327fd322 authored by Ram Prakash Gupta's avatar Ram Prakash Gupta
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mmc: cqhci: CQ Register changes for v5.0 onwards



For SDHC version 5.0 onwards, ICE3.0 specific
registers are added in CQ register space, due to
which few CQ registers(like CQ_VENDOR_GFG,
CQ_CMD_DBG_RAM) are shifted. This change is to add
right offset to shifted registers.

Change-Id: I7b50887c19c49dd90f2b7251c971365f50edb296
Signed-off-by: default avatarSayali Lokhande <sayalil@codeaurora.org>
Signed-off-by: default avatarRam Prakash Gupta <rampraka@codeaurora.org>
parent 8fec754f
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